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TMS320F28379D: ADC Max Data Rates clarity

Chris Yorkey
Genius 16380 points

Part Number: TMS320F28379D

Team,

Our customer needs some clarification on the ADC max sample rates.  Input welcomed.

We have someconfusion related to maximum ADC sampling rate. Suppose, if we assume 12bit resolution case, then based on the technical reference manual we can achieve 200/11 = 18.18MSPS per module (assuming the system clock is 200MHz and no PRESCALE set). However, based on the TMS320F2837xD Dual-Core Real-Time Microcontrollers manual, I found the maximum sampling rate is 3.5MSPS for 12bit resolution. Also found this table specifying ADCCLK speed to be limited between 5-50MHz. Could you please clarify why this different and what is correct information?

 We know that it is 3.5MSPS single channel:

(1) CCS/TMS320F28379D: Achieving Maximum Sampling Rate - C2000 microcontrollers forum - C2000Tm︎ microcontrollers - TI E2E support forums

https://www.ti.com/lit/an/spraap6a/spraap6a.pdf

But any further comments/clarifications welcomed.

TY,

CY

  • 0
    TI__Mastermind 36526 points

    Hi Chris,

    We do not document higher than 50MHz ADCCLK on this device because the ADC would not perform within spec. Honestly, I'm not sure how bad it would be, but we do not test or characterize at higher ADCCLK frequency because we know the performance is poor. 

    Best Regards,

    Ben Collier