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TMS320F28377S: How Generate CRC for All of Flash Memory?

yutao liu
Prodigy 65 points

Part Number: TMS320F28377S

Tool/software:

Dear All:

How can I calculate the CRC value of the whole FLASH through the Linker and put it in the area I specify, so that I can self-check the whole FLASH during the program initialization phase.

And I refer to TI's documentation on compiler generation of CRC and follow its methods, but the compiler reports an error, what is the reason?

Fullscreen TMS320F28377S.txt Download 
/*
 * Copyright (c) 2015-2020, Texas Instruments Incorporated
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 *  ======== TMS320F28377S.cmd ========
 *  Define the memory block start/length for the TMS320F28377S
 */
 
// The user must define CLA_C in the project linker settings if using the
// CLA C compiler
// Project Properties -> C2000 Linker -> Advanced Options -> Command File
// Preprocessing -> --define
#ifdef CLA_C
// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are.
_Cla1Prog_Start = _Cla1funcsRunStart;
-heap 0x400

--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start
#endif //CLA_C


MEMORY
{
PAGE 0 :  /* Program Memory */
          /* BEGIN is used for the "boot to FLASH" bootloader mode   */

	D0SARAM   : origin = 0x00B000, length = 0x001000
	
	RAMLS0_1  : origin = 0x008000, length = 0x001000
    RAMLS2_5  : origin = 0x009000, length = 0x002000 /* on-chip RAM */

    /* Bootload Flash sectors */
	//BEGIN   : origin = 0x080000, length = 0x000002
    //FLASHA  : origin = 0x080002, length = 0x001FFE  /* on-chip Flash */
    //FLASHB  : origin = 0x082000, length = 0x002000  /* on-chip Flash */
	FLASHBLVER		: origin = 0x083FFE, length = 0x000002	/* BOOTLOADER ver */

    GROUP
    {
    	APP_ENDIAN		: origin = 0x084000, length = 0x000002	/* APP_ENDIAN  */
		/* Flash boot address */
	    BEGIN   : origin = 0x084002, length = 0x000002
		/* APP Flash sectors */
		FLASHC  : origin = 0x084004, length = 0x0020FC  /* on-chip Flash */
	    FLASHD  : origin = 0x086100, length = 0x004800  /* on-chip Flash */
	    FLASHE_M  : origin = 0x08A900, length = 0X0001AA//0x0336F8  /* on-chip Flash */
	    FLASHE_PA  : origin = 0x08AAAA, length = 0x000010  /* on-chip Flash */
	    FLASHE_N  : origin = 0x08AABA, length = 0x03353E  /* on-chip Flash */
	    FLASHCODEID : origin = 0x0BDFF8, length = 0x000008  /* APP CODE END ID  */
	    FLASHN  : origin = 0x0BE000, length = 0x002000  /* on-chip Flash */
	    FLASHO  : origin = 0x0C0000, length = 0x002000	/* on-chip Flash */
	    FLASHP  : origin = 0x0C2000, length = 0x002000	/* on-chip Flash */
	    FLASHQ  : origin = 0x0C4000, length = 0x002000	/* on-chip Flash */
	    FLASHR  : origin = 0x0C6000, length = 0x002000	/* on-chip Flash */
	    FLASHS  : origin = 0x0C8000, length = 0x008000	/* on-chip Flash */
	    FLASHT  : origin = 0x0D0000, length = 0x008000	/* on-chip Flash */
	    FLASHU  : origin = 0x0D8000, length = 0x008000	/* on-chip Flash */
	    FLASHV  : origin = 0x0E0000, length = 0x008000	/* on-chip Flash */
	    FLASHW  : origin = 0x0E8000, length = 0x008000	/* on-chip Flash */
	    FLASHX  : origin = 0x0F0000, length = 0X005555//0x008000	/* on-chip Flash */
	    FLASHE_PB  : origin = 0x0F5555, length = 0x000010  /* on-chip Flash */
	    FLASHXX  : origin = 0x0F5565, length = 0x002A9B	/* on-chip Flash */
	    FLASHY  : origin = 0x0F8000, length = 0x002000	/* on-chip Flash */
	    FLASHZ  : origin = 0x0FA000, length = 0x002000	/* on-chip Flash */
	    FLASHAA : origin = 0x0FC000, length = 0x002000	/* on-chip Flash */
	    FLASHAB : origin = 0x0FE000, length = 0x001FF0	/* on-chip Flash */
    } crc(_flash_crc, algorithm=CRC32_PRIME)

    CRC_PRELUDE : origin=0x0FFFF0, length=0x10

    //FLASHAB : origin = 0x0FE000, length = 0x002000	/* on-chip Flash */
    RESET   : origin = 0x3FFFC0, length = 0x000002

PAGE 1 : /* Data Memory */

    BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom
                                                        will use this for
                                                        stack */
                                                        
	RAMID	  : origin = 0x000122, length = 0x000010 /* on-chip RAM block M0 */
    M01SARAM  : origin = 0x000132, length = 0x0006CE  /* on-chip RAM */

    /* on-chip Global shared RAMs */
    RAMEX   : origin = 0x00C000, length = 0x000010
    RAMGS0  : origin = 0x00C010, length = 0x000FF0
    RAMGS1_3  : origin = 0x00D000, length = 0x003000
    //RAMGS2  : origin = 0x00E000, length = 0x001000
    //RAMGS3  : origin = 0x00F000, length = 0x001000
    RAMGS4  : origin = 0x010000, length = 0x001000
    RAMGS5  : origin = 0x011000, length = 0x001000
    RAMGS6  : origin = 0x012000, length = 0x001000
    RAMGS7  : origin = 0x013000, length = 0x001000
    RAMGS8  : origin = 0x014000, length = 0x001000
    RAMGS9_13 : origin = 0x015000, length = 0x005000
    //RAMGS11 : origin = 0x017000, length = 0x001000
    //RAMGS12 : origin = 0x018000, length = 0x001000
    //RAMGS13 : origin = 0x019000, length = 0x001000
    RAMGS14 : origin = 0x01A000, length = 0x001000
    RAMGS15 : origin = 0x01B000, length = 0x001000

	CLA1_MSGRAMLOW   : origin = 0x001480,   length = 0x000080
	CLA1_MSGRAMHIGH  : origin = 0x001500,   length = 0x000080
}


SECTIONS
{
	.TI.memcrc			: > CRC_PRELUDE  PAGE = 0
	CodeID              : > FLASHCODEID  PAGE = 0
	blVer               : > FLASHBLVER   PAGE = 0
	endianflag          : > APP_ENDIAN   PAGE = 0
	ramid               : > RAMID        PAGE = 1
	FlashPa               : > FLASHE_PA        PAGE = 0
	FlashPb               : > FLASHE_PB        PAGE = 0
    /* Allocate program areas: */
    .cinit              : > FLASHD | FLASHE_M | FLASHE_N |
                            /*FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |
                            FLASHK | FLASHL | FLASHM |*/ FLASHN | FLASHO |
                            FLASHP | FLASHQ | FLASHR | FLASHS | FLASHT |
                            FLASHU | FLASHV | FLASHW | FLASHX | FLASHXX | FLASHY |
                            FLASHZ | FLASHAA | FLASHAB PAGE = 0
    .binit              : > FLASHD | FLASHE_M | FLASHE_N |
                            /*FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |
                            FLASHK | FLASHL | FLASHM |*/ FLASHN | FLASHO |
                            FLASHP | FLASHQ | FLASHR | FLASHS | FLASHT |
                            FLASHU | FLASHV | FLASHW | FLASHX | FLASHXX | FLASHY |
                            FLASHZ | FLASHAA | FLASHAB PAGE = 0
#ifdef __TI_EABI__
    .init_array         : > FLASHD | FLASHE_M | FLASHE_N |
                            /*FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |
                            FLASHK | FLASHL | FLASHM |*/ FLASHN | FLASHO |
                            FLASHP | FLASHQ | FLASHR | FLASHS | FLASHT |
                            FLASHU | FLASHV | FLASHW | FLASHX | FLASHXX | FLASHY |
                            FLASHZ | FLASHAA | FLASHAB PAGE = 0
#else
    .pinit              : > FLASHD | FLASHE_M | FLASHE_N |
                            /*FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |
                            FLASHK | FLASHL | FLASHM |*/ FLASHN | FLASHO |
                            FLASHP | FLASHQ | FLASHR | FLASHS | FLASHT |
                            FLASHU | FLASHV | FLASHW | FLASHX | FLASHXX | FLASHY |
                            FLASHZ | FLASHAA | FLASHAB PAGE = 0
#endif
    .text               : > FLASHD | FLASHE_M | FLASHE_N |
                            /*FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |
                            FLASHK | FLASHL | FLASHM |*/ FLASHN | FLASHO |
                            FLASHP | FLASHQ | FLASHR | FLASHS | FLASHT |
                            FLASHU | FLASHV | FLASHW | FLASHX | FLASHXX | FLASHY |
                            FLASHZ | FLASHAA | FLASHAB PAGE = 0
    codestart           : > BEGIN   PAGE = 0
    ramfuncs            : LOAD = FLASHD | FLASHE_M | FLASHE_N |
                            /*FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |
                            FLASHK | FLASHL | FLASHM |*/ FLASHN | FLASHO |
                            FLASHP | FLASHQ | FLASHR | FLASHS | FLASHT |
                            FLASHU | FLASHV | FLASHW | FLASHX | FLASHXX | FLASHY |
                            FLASHZ | FLASHAA | FLASHAB PAGE = 0
                          RUN  = RAMGS9_13  PAGE = 1
                          LOAD_START(_RamfuncsLoadStart),
                          LOAD_SIZE(_RamfuncsLoadSize),
                          LOAD_END(_RamfuncsLoadEnd),
                          RUN_START(_RamfuncsRunStart),
                          RUN_SIZE(_RamfuncsRunSize),
                          RUN_END(_RamfuncsRunEnd)

#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
    .TI.ramfunc : {} LOAD = FLASHD | FLASHE_M | FLASHE_N |
                            /*FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |
                            FLASHK | FLASHL | FLASHM |*/ FLASHN | FLASHO |
                            FLASHP | FLASHQ | FLASHR | FLASHS | FLASHT |
                            FLASHU | FLASHV | FLASHW | FLASHX | FLASHXX | FLASHY |
                            FLASHZ | FLASHAA | FLASHAB PAGE = 0,
                    RUN  = RAMGS9_13  PAGE = 1
                     table(BINIT)
#endif
#endif

    .text:_ti_sysbios_knl_Swi_or__E : LOAD = FLASHE_M|FLASHE_N PAGE = 0,
									RUN = RAMGS14 PAGE = 1, 
									table(BINIT)

	.text:_ti_sysbios_knl_Swi_post__E : LOAD = FLASHE_M|FLASHE_N PAGE = 0,
									RUN = RAMGS14 PAGE = 1, 
									table(BINIT)

	.text:_ti_sysbios_knl_Swi_disable__E : LOAD = FLASHE_M|FLASHE_N PAGE = 0,
									RUN = RAMGS14 PAGE = 1, 
									table(BINIT)

	.text:_ti_sysbios_knl_Queue_enqueue__E : LOAD = FLASHE_M|FLASHE_N PAGE = 0,
									RUN = RAMGS14 PAGE = 1, 
									table(BINIT)

	.text:_ti_sysbios_knl_Swi_schedule__I : LOAD = FLASHE_M|FLASHE_N PAGE = 0,
									RUN = RAMGS14 PAGE = 1, 
									table(BINIT)

    /* Allocate uninitalized data sections: */
    .stack              : > D0SARAM/* | RAMGS2 | RAMGS3*/    PAGE = 0
#ifdef __TI_EABI__
    .bss                : >> RAMGS0 | RAMGS1_3/* | RAMGS2 | RAMGS3*/   PAGE = 1
    .sysmem             : > RAMGS0 | RAMGS1_3/* | RAMGS2 | RAMGS3*/    PAGE = 1
#else
    .ebss               : >> RAMGS0 | RAMGS1_3 | RAMGS4 | RAMGS5 | RAMGS6  PAGE = 1	ALIGN(2)
    .esysmem            : > RAMGS0 | RAMGS1_3 | RAMGS4/* | RAMGS2 | RAMGS3*/    PAGE = 1	ALIGN(2)
#endif
    .data               : >> RAMGS0 | RAMGS1_3/* | RAMGS2 | RAMGS3*/ PAGE = 1
    .cio                : > RAMGS0 | RAMGS1_3/* | RAMGS2 | RAMGS3*/    PAGE = 1

	EXRAM				: > RAMEX/* | RAMGS2 | RAMGS3*/    PAGE = 1
    /* Initalized sections go in Flash */
#ifdef __TI_EABI__
    .const             : > FLASHD | FLASHE_M | FLASHE_N |
                            /*FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |
                            FLASHK | FLASHL | FLASHM | */FLASHN | FLASHO |
                            FLASHP | FLASHQ | FLASHR | FLASHS | FLASHT |
                            FLASHU | FLASHV | FLASHW | FLASHX | FLASHXX | FLASHY |
                            FLASHZ | FLASHAA | FLASHAB PAGE = 0
#else
    .econst             : > FLASHD | FLASHE_M | FLASHE_N |
                            /*FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |
                            FLASHK | FLASHL | FLASHM |*/ FLASHN | FLASHO |
                            FLASHP | FLASHQ | FLASHR | FLASHS | FLASHT |
                            FLASHU | FLASHV | FLASHW | FLASHX | FLASHXX | FLASHY |
                            FLASHZ | FLASHAA | FLASHAB PAGE = 0
#endif
    .switch             : > FLASHD | FLASHE_M | FLASHE_N |
                            /*FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |
                            FLASHK | FLASHL | FLASHM |*/ FLASHN | FLASHO |
                            FLASHP | FLASHQ | FLASHR | FLASHS | FLASHT |
                            FLASHU | FLASHV | FLASHW | FLASHX | FLASHXX | FLASHY |
                            FLASHZ | FLASHAA | FLASHAB PAGE = 0
    .args               : > FLASHD | FLASHE_M | FLASHE_N |
                            /*FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |
                            FLASHK | FLASHL | FLASHM |*/ FLASHN | FLASHO |
                            FLASHP | FLASHQ | FLASHR | FLASHS | FLASHT |
                            FLASHU | FLASHV | FLASHW | FLASHX | FLASHXX | FLASHY |
                            FLASHZ | FLASHAA | FLASHAB PAGE = 0
    .reset              : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */

	trigerbuf			: > RAMGS15			   PAGE = 1

	/* CLA specific sections */
	Cla1Prog         : LOAD = FLASHC,
	                  RUN = RAMLS2_5,
	                  LOAD_START(_Cla1funcsLoadStart),
	                  LOAD_END(_Cla1funcsLoadEnd),
	                  RUN_START(_Cla1funcsRunStart),
	                  LOAD_SIZE(_Cla1funcsLoadSize),
	                  PAGE = 0, ALIGN(4)

	CLAData			: > RAMLS0_1, PAGE=0

	Cla1ToCpuMsgRAM  : > CLA1_MSGRAMLOW,   PAGE = 1
	CpuToCla1MsgRAM  : > CLA1_MSGRAMHIGH,  PAGE = 1

#ifdef CLA_C
	/* CLA C compiler sections */
	//
	// Must be allocated to memory the CLA has write access to
	//
	CLAscratch       :
	                 { *.obj(CLAscratch)
	                 . += CLA_SCRATCHPAD_SIZE;
	                 *.obj(CLAscratch_end) } >  RAMLS0_1,  PAGE = 0

	.scratchpad      : > RAMLS0_1,       PAGE = 0
	.bss_cla		 : > RAMLS0_1,       PAGE = 0
	.const_cla	     :  LOAD = FLASHC,
	                   RUN = RAMLS0_1,
	                   RUN_START(_Cla1ConstRunStart),
	                   LOAD_START(_Cla1ConstLoadStart),
	                   LOAD_SIZE(_Cla1ConstLoadSize),
	                   PAGE = 0
#endif //CLA_C
}

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