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TMS320F280049C: Generating interrupt according to multiple EOC of multiple SOC

Gökhan Bayraktar
Prodigy 100 points
Part Number: TMS320F280049C
Other Parts Discussed in Thread: C2000WARE

Tool/software:

Hello,

I am trying to generate a single interrupt by using multiple EOC signal of multiple SOC of different ADC core.

I am using all the three ADC core of the chip (A,B and C)

I have set the sampling and conversion configurations and no problem occurs about them.

Totally, there are 9 samples and conversion.

I want to generate an interrupt after all the conversions are completed.

For each ADC core I can generate 3 EOC triggers for the same Interrupt but in that condition, I suppose I can not know whether all the conversions of each core are completed. Because all the ADC cores operates simultaneously and there may be slight differences between cores and one of EOC can be set earlier.

I imagine if I can insert three EOC signal from each core into a logic AND operator and output of the operator can be the source of interrupt. But i don't know if that works.

How can I create a solution for my demand?

Best regards,

Gökhan.

  • 0
    TI__Mastermind 36526 points

    Hi Gokhan,

    I think the easiest way to solve this issue is to let all three EOC signals trigger an interrupt, but you check to see if the the other interrupts have been triggered before doing the computation of the ISR. For example, you could increment some global variable each time an interrupt is triggered like below.

    The CPU overhead for doing something like this should be very low.  

    example_interrupt(){

        if(global_var==2){

            do_computation();

            global_var = 0; 

        }

        else{

            global_var++; 

        }

    }

    Best Regards,

    Ben Collier

  • 0 in reply to Benjamin Collier
    Prodigy 100 points

    Hello Ben, 

    Thank you for your answer.

    If I am not wrong to you mean that each EOC triggers the same interrupt right?

    If so, I wonder that what happens if an EOC triggers the interrupt and while checking the if condition & increasing the global variable the second EOC triggers the interrupt. Since first interrupt is not cleared yet what will happen to the second interrupt trigger?

    These three EOC will be generated at quite same time. Maybe within a 1-2 clock cycle because their related ADC cores operating in parallel.

    Also, entering and existing three interrupts separately ,even if it is the same, will cause execution time. Is there a way to combine three EOC and triggers a single interrupt?

  • 0 in reply to Gökhan Bayraktar
    TI__Mastermind 36526 points

    Hi,

    This image is from the TRM:

    Each ADC has 4 interrupts, I was recommending that you using a different interrupt for each ADC.

    Best Regards,

    Ben Collier

  • 0 in reply to Benjamin Collier
    Prodigy 100 points

    Hello Ben,

    Thank you for the support again.

    When I see the example "adc_ex10_multiple_soc_epwm" from C2000ware 5.01 I noticed that only ADCA interrupt has been used for both ADCA and ADCC conversion result. The ADCA interrupt is triggered when EOC2 is set.

    So, how can we be sure that ADCC conversions are all completed while the we are in the ADCA interrupt?

    Best regards,

    Gökhan.

  • 0 in reply to Gökhan Bayraktar
    TI__Mastermind 23220 points

    Hi Gökhan,

    This expert is currently on leave until 6/10. Please allow until then for a response. Thanks for the patience!

    Best Regards,

    Allison

  • 0 in reply to Gökhan Bayraktar
    TI__Mastermind 36526 points

    Hi,

    Gökhan Bayraktar said:
    So, how can we be sure that ADCC conversions are all completed while the we are in the ADCA interrupt?

    The example is relying upon both ADCs having the same timings, which will mostly be the case. If some software stops and then resumes one of the ADCs, this would no longer be the case.

    Gökhan Bayraktar said:
    So, how can we be sure that ADCC conversions are all completed while the we are in the ADCA interrupt?

    I think that the only way to do this is to use interrupt flags from ADCC, triggered by the last EOC from ADCC. Even if you do not use an ISR for ADCC, you could do something like:

    while(interrupt flag from ADCC is low){

    do nothing;

    }

    Then make sure to clear the interrupt flag from ADCC afterwards.

    Best Regards,

    Ben Collier