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TMS320F28388D: External SDRAM Selection Help

Part Number: TMS320F28388D

Tool/software:

Hello,

I want to use 64MB external SDRAM with EMIF.

ISSI IS42S32160F meets my requirements. But it has 133MHz, 143MHz and 167MHz frequencies.

TMS32028388D mcu EMIF frequency is 100MHz.

1) In this case, can I use this SDRAM with 100MHz or can I only use it with 133, 143, 167MHz options?

2) How to choose EMIF compliant SDRAM? What should be considered?

3) IS42S32160F SDRAM has a configuration of 4M x 32 x 4. Is it possible to address this SDRAM when I use EMIF1?

  • 1) In this case, can I use this SDRAM with 100MHz or can I only use it with 133, 143, 167MHz options?

    You can use any one of them. The frequency of the SDRAM should be >= EMIF_CLK

    2) How to choose EMIF compliant SDRAM? What should be considered?

    EMIF_CLK is configurable for meeting the timing requirements in the SDRAM. Check if EMIF supports the bank number of SDRAM, CAS latency, # of column address, and # of row address.

    3) IS42S32160F SDRAM has a configuration of 4M x 32 x 4. Is it possible to address this SDRAM when I use EMIF1?

    This SDRAm is ok for EMIF1. Please use the example in EMIF chapter when configuring EMIF to meet SDRAM requirements.

  • Here's what's bothering me;

    EMIF1 addressing bits are 20 bits. That's 1M addresses. But the IS42S32160F is 4M x 32 x 4. In this case I can only use 1M address for each page? Can you help me understand this part?

  • Hi,

    For aync memory attached to EMIF, the maximum memory size is calculated by 2^(# of addr pin). If 4 pins (A[3:0]) are used, the memory size is 2^4=16 words

    For sync memory (SDRAM), the memory size is calculated by 2^(# row address pins + # of column address pins + # of BA). A[x:0] can be used as both row addresses and column addresses. To interface IS42S32160F SDRAM, only A[12:0] and BA[1:0] are used.