Tool/software:
Hi Team,
I am using two Boards (TMS320F2800157) connected through I2C, I am trying to use FIFO to send and receive data.
I was able to send data from 1st board TX Buffer to 2nd Board RX Buffer and raise interrupt in the 2nd Board itself.
Inside the buffer I was able to getData. Inside the same ISR I cleared all interrupts and then tried to putData so that I can receive in 1st Board RX Buffer with a raised ISR call.
I saw in 2nd board that while sending, the bus was busy and MST or master mode bit was turned into 0 as well as arbitration lost bit was set high.
My guess is that the 1st Board is master and not releasing control for other to send data.
How can I release the master control on 1st board as soon as transaction is done for the first time if my above guess is write?
Thanks!