TMS320F28377D: The issue of booting fail in flash boot mode

Part Number: TMS320F28377D
Other Parts Discussed in Thread: C2000WARE, CONTROLSUITE

Tool/software:

Hello,

I am requesting help with a booting issue encountered while working on firmware development using the TMS320F28377D with a custom circuit.

First, the work environment is Code Composer Studio Ver.12.2, and the phenomenon is as follows: When the emulator is used to compile and download the program, it executes successfully. However, after verifying the operation and then turning the power off and on again, the system does not boot. Upon investigation, it was found that the booting success is determined by the following measures: When the system does not boot from power on, if global variables are minimized by deleting them, it operates normally. Research suggested that applying "#pragma DATA_SECTION(000, ".ooo")" would optimize the variables, and applying this confirmed normal operation with the same variable declarations. The issue arose after this point, as the situation required the continuous addition of variables, and now even using "#pragma" does not allow the system to boot.

Is there any solution to this problem? Or am I missing another issue?

Thanks in advance

  • Sewook,

    I'm assuming you are building your project for flash execution and the linker .cmd file is configured as such.  Can you compare your .cmd to one of our standard flash.cmd to see if there are any obvious differences?  You can find one for your device here: C:\ti\c2000\C2000Ware_5_02_00_00\device_support\f2837xd\common\cmd\2837xD_FLASH_lnk_cpu1.cmd

    Specifically we want to make sure you have used address 0x80000(default flash boot location) to hold the call to codestartbranch.asm file which will configure the device before branching to your main.

    Often when I see this issue it is because the flash boot has not been taken care of, when you are using CCS/debugger it will automatically start code execution at main() for you, and the GEL file will take care of the same settings in codestart.  But in standalone boot we have to make sure to take care of these manually.

    Best,
    Matthew

  • Hello Matthew,

    First of all, thank you for your interest and response.

    We have used TI's standard flash.cmd file and made some modifications. The referenced file is provided by "controlSUITE" and can be found at "C:\ti\controlSUITE\device_support\F2837xD\v210\F2837xD_common\cmd\2837xD_FLASH_CLA_lnk_cpu1.cmd".

    The mentioned 0x80000 section appears to be the same.

    I am attaching the file content. If possible, could you please check it?

    Thank you in advance.

    ================================= 2837xD_FLASH_CLA_lnk_cpu1.cmd =================================

    // The user must define CLA_C in the project linker settings if using the
    // CLA C compiler
    // Project Properties -> C2000 Linker -> Advanced Options -> Command File
    // Preprocessing -> --define
    #ifdef CLA_C
    // Define a size for the CLA scratchpad area that will be used
    // by the CLA compiler for local symbols and temps
    // Also force references to the special symbols that mark the
    // scratchpad are.
    CLA_SCRATCHPAD_SIZE = 0x100;
    --undef_sym=__cla_scratchpad_end
    --undef_sym=__cla_scratchpad_start
    #endif //CLA_C

    MEMORY
    {
    PAGE 0 :
    /* BEGIN is used for the "boot to SARAM" bootloader mode */

    BEGIN : origin = 0x080000, length = 0x000002
    RAMM0 : origin = 0x000122, length = 0x0002DE
    RAMD0 : origin = 0x00B000, length = 0x000800
    RAMLS4_LS5 : origin = 0x00A000, length = 0x001000

    RAMGS7_13 : origin = 0x013000, length = 0x007000
    RAMGS14 : origin = 0x01A000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
    RAMGS15 : origin = 0x01B000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
    RESET : origin = 0x3FFFC0, length = 0x000002

    /* Flash sectors */
    FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
    FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
    FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
    FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
    FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
    FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
    FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
    FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
    FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
    FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
    FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
    FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
    FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
    FLASHN : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */

    PAGE 1 :

    BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
    RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */

    RAMLS0 : origin = 0x008000, length = 0x000800
    RAMLS1 : origin = 0x008800, length = 0x000800
    RAMLS2 : origin = 0x009000, length = 0x000800
    RAMLS3 : origin = 0x009800, length = 0x000800

    RAMGS0 : origin = 0x00C000, length = 0x001000
    RAMGS1 : origin = 0x00D000, length = 0x001000
    RAMGS2 : origin = 0x00E000, length = 0x001000
    RAMGS3 : origin = 0x00F000, length = 0x001000
    RAMGS4 : origin = 0x010000, length = 0x001000
    RAMGS5 : origin = 0x011000, length = 0x001000
    RAMGS6 : origin = 0x012000, length = 0x001000

    FRAM : origin = 0x00108000, length = 0x008000


    CLA1_MSGRAMLOW : origin = 0x001480, length = 0x000080
    CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080

    //EMIF1_CS2n : origin = 0x00100000, length = 0x00200000
    //EMIF1_CS3n : origin = 0x00300000, length = 0x00080000
    //EMIF1_CS4n : origin = 0x00380000, length = 0x00060000
    }


    SECTIONS
    {
    /* Allocate program areas: */
    .cinit : > FLASHB PAGE = 0, ALIGN(4)
    .pinit : > FLASHC, PAGE = 0, ALIGN(4)
    .text : > FLASHD |FLASHE, PAGE = 0, ALIGN(4)
    codestart : > BEGIN PAGE = 0, ALIGN(4)

    /* Allocate uninitalized data sections: */
    .stack : > RAMM1 PAGE = 1
    .ebss : > RAMGS0 PAGE = 1
    .esysmem : > RAMGS1 PAGE = 1

    /* Initalized sections go in Flash */
    .econst : > FLASHF PAGE = 0, ALIGN(4)
    .switch : > FLASHG PAGE = 0, ALIGN(4)

    .reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */

    Filter_RegsFile : > RAMGS2, PAGE = 1


    /*ㅖ#pragma DATA_SECTION() Memory assign */
    .gV_StatusArmDrive : > RAMGS6, PAGE = 1
    .gV_StatusFireReady : > RAMGS6, PAGE = 1
    .gV_DisplayTxCount : > RAMGS6, PAGE = 1
    .gV_DisplayTxlength : > RAMGS6, PAGE = 1
    .gV_DisplayTxFireCountSum : > RAMGS6, PAGE = 1
    .gV_GunPositionTN : > RAMGS6, PAGE = 1
    .gV_GunPositionEL : > RAMGS6, PAGE = 1
    .gV_GunPositionELUpperLimit : > RAMGS6, PAGE = 1
    .gV_GunPositionELLowerLimit : > RAMGS6, PAGE = 1
    .gV_GunPositionErrorELUpperLimit : > RAMGS6, PAGE = 1
    .gV_GunPositionErrorELLowerLimit : > RAMGS6, PAGE = 1
    .gV_GunPositionELForTestDevice : > RAMGS6, PAGE = 1
    .gV_GunPositionTNOld : > RAMGS6, PAGE = 1
    .gV_GunPositionELOld : > RAMGS6, PAGE = 1
    .gV_GunPositionErrorTN : > RAMGS6, PAGE = 1
    .gV_GunPositionErrorEL : > RAMGS6, PAGE = 1
    .gV_GunPositionErrorTNDac: > RAMGS6, PAGE = 1
    .gV_GunPositionErrorELDac: > RAMGS6, PAGE = 1
    .gV_TNGainKp : > RAMGS6, PAGE = 1
    .gV_TNGainKpZm : > RAMGS6, PAGE = 1
    .gV_TNGainKpZmVr : > RAMGS6, PAGE = 1
    .gV_TNGainKpUZm : > RAMGS6, PAGE = 1
    .gV_TNGainKpUZmVr : > RAMGS6, PAGE = 1
    .gV_TNGainKpULZm : > RAMGS6, PAGE = 1
    .gV_TNGainKpULZmVr : > RAMGS6, PAGE = 1
    .gV_TNGainKpZmRangeInner : > RAMGS6, PAGE = 1
    .gV_TNGainKpZmRangeOuter : > RAMGS6, PAGE = 1
    .gV_TNGainKpZmRangeLimit : > RAMGS6, PAGE = 1
    .gV_TNFeedFowrd : > RAMGS6, PAGE = 1
    .gV_TNGainKf : > RAMGS6, PAGE = 1
    .gV_TNFeedFowrdAccel : > RAMGS6, PAGE = 1
    .gV_TNFeedFowrdAccelError: > RAMGS6, PAGE = 1
    .gV_TNGainKa : > RAMGS6, PAGE = 1
    .gV_ELFeedFowrd : > RAMGS6, PAGE = 1
    .gV_ELGainKf : > RAMGS6, PAGE = 1
    .gV_ELFeedFowrdAccel : > RAMGS6, PAGE = 1
    .gV_ELFeedFowrdAccelError: > RAMGS6, PAGE = 1
    .gV_ELGainKa : > RAMGS6, PAGE = 1
    .gV_ELGainKp : > RAMGS6, PAGE = 1
    .gV_ELGainKpZm : > RAMGS6, PAGE = 1
    .gV_ELGainKpZmVr : > RAMGS6, PAGE = 1
    .gV_ELGainKpUZm : > RAMGS6, PAGE = 1
    .gV_ELGainKpUZmVr : > RAMGS6, PAGE = 1
    .gV_ELGainKpULZm : > RAMGS6, PAGE = 1
    .gV_ELGainKpULZmVr : > RAMGS6, PAGE = 1
    .gV_ELGainKpZmRangeInner : > RAMGS6, PAGE = 1
    .gV_ELGainKpZmRangeOuter : > RAMGS6, PAGE = 1
    .gV_ELGainKpZmRangeLimit : > RAMGS6, PAGE = 1
    .gV_PBITResultDisplayModule : > RAMGS6, PAGE = 1
    .gV_FCSCommand : > RAMGS6, PAGE = 1
    .gV_FCSTNPosition : > RAMGS6, PAGE = 1
    .gV_FCSELPosition : > RAMGS6, PAGE = 1
    .gV_TNWi : > RAMGS6, PAGE = 1
    .gV_ELWi : > RAMGS6, PAGE = 1
    .gV_ELWiUpperLimit : > RAMGS6, PAGE = 1
    .gV_ELWiLowerLimit : > RAMGS6, PAGE = 1
    .gV_GunPositionTNEncoderBuffer : > RAMGS6, PAGE = 1
    .gV_GunPositionELEncoderBuffer : > RAMGS6, PAGE = 1
    .gV_VMETxNGSCBITResult : > RAMGS6, PAGE = 1
    .gV_VMETxNGSIBITResult : > RAMGS6, PAGE = 1
    .gV_CanAID060_TXMsgData : > RAMGS6, PAGE = 1
    .gV_CanAID600_RXMsgData : > RAMGS6, PAGE = 1
    .gV_CanBID600_TXMsgData : > RAMGS6, PAGE = 1
    .gV_CanBID630_TXMsgData : > RAMGS6, PAGE = 1
    .gV_CanBID640_TXMsgData : > RAMGS6, PAGE = 1
    .gV_CanBID641_TXMsgData : > RAMGS6, PAGE = 1
    .gV_CanBID642_TXMsgData : > RAMGS6, PAGE = 1
    .gV_CanBID643_TXMsgData : > RAMGS6, PAGE = 1
    .gV_CanBID644_TXMsgData : > RAMGS6, PAGE = 1
    .gV_CanBID645_TXMsgData : > RAMGS6, PAGE = 1
    .gV_CanBID646_TXMsgData : > RAMGS6, PAGE = 1
    .gV_CanBID647_TXMsgData : > RAMGS6, PAGE = 1
    .gV_CanBID780_TXMsgData : > RAMGS6, PAGE = 1
    .gV_CanBID060_RXMsgData : > RAMGS6, PAGE = 1
    .gV_CanBID360_RXMsgData : > RAMGS6, PAGE = 1
    .gV_CanBID361_RXMsgData : > RAMGS6, PAGE = 1
    .gV_CanBID460_RXMsgData : > RAMGS6, PAGE = 1
    .gV_CanBID461_RXMsgData : > RAMGS6, PAGE = 1
    .gV_CanBID462_RXMsgData : > RAMGS6, PAGE = 1
    .gV_CanBID463_RXMsgData : > RAMGS6, PAGE = 1
    .gV_CanBID870_RXMsgData : > RAMGS6, PAGE = 1
    .gV_CanAstatus : > RAMGS6, PAGE = 1
    .gV_CanBstatus : > RAMGS6, PAGE = 1
    .gV_DisplayTxDataBuffer : > RAMGS6, PAGE = 1
    .gV_iGCURxChannel1GCUStatusBuffer : > RAMGS6, PAGE = 1
    .gV_iGCURxChannel2GCUStatusBuffer : > RAMGS6, PAGE = 1
    .gV_GCUTxbuffer : > RAMGS6, PAGE = 1
    .gV_TestPorgramTxbuffer : > RAMGS6, PAGE = 1
    .gV_TestPorgramRxbuffer : > RAMGS6, PAGE = 1
    .gV_DisplayProgramRxDataBuffer : > RAMGS6, PAGE = 1
    .gV_FramNFZELData : > RAMGS6, PAGE = 1
    .gV_GCURxBufferCH1 : > RAMGS6, PAGE = 1
    .gV_GCURxBufferCH2 : > RAMGS6, PAGE = 1

    /* CLA specific sections */
    Cla1Prog : LOAD = FLASHH,
    RUN = RAMLS4_LS5,
    LOAD_START(_Cla1funcsLoadStart),
    LOAD_END(_Cla1funcsLoadEnd),
    RUN_START(_Cla1funcsRunStart),
    LOAD_SIZE(_Cla1funcsLoadSize),
    PAGE = 0, ALIGN(4)

    CLADataLS0 : > RAMLS0, PAGE=1
    CLADataLS1 : > RAMLS1, PAGE=1

    Cla1ToCpuMsgRAM : > CLA1_MSGRAMLOW, PAGE = 1
    CpuToCla1MsgRAM : > CLA1_MSGRAMHIGH, PAGE = 1

    #ifdef __TI_COMPILER_VERSION__
    #if __TI_COMPILER_VERSION__ >= 15009000
    .TI.ramfunc : {} LOAD = FLASHI | FLASHJ,
    RUN = RAMGS7_13,
    LOAD_START(_RamfuncsLoadStart),
    LOAD_SIZE(_RamfuncsLoadSize),
    LOAD_END(_RamfuncsLoadEnd),
    RUN_START(_RamfuncsRunStart),
    RUN_SIZE(_RamfuncsRunSize),
    RUN_END(_RamfuncsRunEnd),
    PAGE = 0, ALIGN(4)
    #else
    ramfuncs : LOAD = FLASHD,
    RUN = RAMGS7_13,
    LOAD_START(_RamfuncsLoadStart),
    LOAD_SIZE(_RamfuncsLoadSize),
    LOAD_END(_RamfuncsLoadEnd),
    RUN_START(_RamfuncsRunStart),
    RUN_SIZE(_RamfuncsRunSize),
    RUN_END(_RamfuncsRunEnd),
    PAGE = 0, ALIGN(4)
    #endif
    #endif

    /* The following section definition are for SDFM examples */
    Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
    Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
    Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
    Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444

    #ifdef CLA_C
    /* CLA C compiler sections */
    //
    // Must be allocated to memory the CLA has write access to
    //
    CLAscratch :
    { *.obj(CLAscratch)
    . += CLA_SCRATCHPAD_SIZE;
    *.obj(CLAscratch_end) } > RAMLS1, PAGE = 1

    .scratchpad : > RAMLS1, PAGE = 1
    .bss_cla : > RAMLS1, PAGE = 1
    .const_cla : LOAD = FLASHB,
    RUN = RAMLS1,
    RUN_START(_Cla1ConstRunStart),
    LOAD_START(_Cla1ConstLoadStart),
    LOAD_SIZE(_Cla1ConstLoadSize),
    PAGE = 1, ALIGN(4)
    #endif //CLA_C
    }

    /*
    //===========================================================================
    // End of file.
    //===========================================================================
    */

    ===============================================================================================

  • Sewook,

    In you code do you see memcopy function getting called?  This is our device.c file.  Since you are using CLA, we should see something similar to copy the CLA portion of code from flash to RAM as well.

    #ifndef CMDTOOL
    //
    // Copy time critical code and flash setup code to RAM. This includes the
    // following functions: InitFlash();
    //
    // The RamfuncsLoadStart, RamfuncsLoadSize, and RamfuncsRunStart symbols
    // are created by the linker. Refer to the device .cmd file.
    //
    memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
    #endif

    Best,

    Matthew

  • Matthew,

    The CLA code copying part you mentioned is new information to me.

    Currently, the configuration is as follows:
    In the initialization part of "main()", we call "InitSysCtrl()" from the "F2837xD_SysCtrl.c" file.
    ================================================================
    void main(void)
    {
    //
    // Step 1. Initialize System Control:
    // PLL, WatchDog, enable Peripheral Clocks
    // This example function is found in the F2837xD_SysCtrl.c file.
    //
    InitSysCtrl();

    ....
    ================================================================

    And inside "InitSysCtrl()", it is executed as follows. ("_FLASH" is declared as a "Predefined Symbol" in the build settings)
    ================================================================
    void InitSysCtrl(void)
    {
    //
    // Disable the watchdog
    //
    DisableDog();

    #ifdef _FLASH
    //
    // Copy time critical code and Flash setup code to RAM. This includes the
    // following functions: InitFlash()
    //
    // The RamfuncsLoadStart, RamfuncsLoadSize, and RamfuncsRunStart
    // symbols are created by the linker. Refer to the device .cmd file.
    //
    memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);


    //
    // Call Flash Initialization to setup flash waitstates. This function must
    // reside in RAM.
    //
    InitFlash();
    #endif
    ================================================================

    If additional CLA code copying is required, I would like to know the details about it.

    Best,

    Sewook

  • Hi Sewook,

    Matt is out of office until 07/01. Please expect a delay in response until then. Thanks for your patience.

    Best Regards,

    Allison