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TMS320F280025C: Reduce PWM duty using CLB

Quy Nguyen
Intellectual 375 points

Part Number: TMS320F280025C

Tool/software:

Hello CLB expert,

I want to continuously reduce the duty cycle of 2 PWMs (same frequency 200kHz and duty cycle, phase offset 180°) as long as error happens (CMPSS3.CTRIPOUTH= high) as the diagram below

As long as the error there, the duty cycles are continued reduced by x% until LIMIT.

I'm thinking about a solution:

  • Using CLB counter to count from TBCTR=0 to TBCTR=CMPA to get the current duty.
  • Then reduce it by an amount with HLC instructions.
  • Then either update PWM.CMPA directly using HLC or
  • put it in to SPI RX Buffer and a DMA linked with SPIRX/CLB Interrupt will update PWM.CMPA.

 

Do you think it is doable and could you please help me to improve it as well as implement HLC instructions?

 

Thank you and regards

Quy

  • 0
    TI__Mastermind 28580 points

    Hi Quy,

    I'm assuming you want to reduce the PWM duty cycle without any CPU intervention. Are you using an actual EPWM module as well or purely CLB to recreate your PWM signal?

    This definitely seems doable, feel free to share your CLB implementation in a .syscfg file or let me know if you need assistance creating this. It's not clear to me how the HLC would update EPWM.CMPA. If you're not sure how to do this either, I can provide some suggestions that would achieve the same end result.

    Thank you,

    Luke

  • 0 in reply to Luke Jones
    Intellectual 375 points

    Hi Luke,

     

    Thanks for replying.

     

    Of course changing duty cycle in interrupt service linked with CMPSS is easy but I think it's slow for 200kHz PWM.

     

    I prefer actual PWM because it has many advantage than creating with CLB. I'd like to trigger ADC conversion with PWM edge as well.

     

    I don't know how HLC updates EPWM.CMPA directly. It's just my idea.

     

    Please find attached my syscfg file.

    • I count duty of PWM5 every pediod while CTRIPOUTH = low
    • when CTRIPOUTH= high and TBCTR=0, I trigger HLC to
      • Move current counter value C0 to R0
      • then R0 = R0 - 5 to reduce duty cycle,
      • Move R0 to C0 for next reduction in next PWM period
      • then trigger SPI push R0 to the SPIRX buffer
    • DMA linked with SPIRX will transfer data from RXBUF to EPWM5.CMPA and EPWM4.CMPA

     

    I don't know how to check if R0 <= DutyLimit then set R0 = DutyLimit

     

    Please kindly check if it is correct and suggest me some improvements.

    Thank you.

    Quy

    5810.empty.zip

  • 0 in reply to Quy Nguyen
    TI__Mastermind 28580 points

    Hi Quy,

    To make R0 = DutyLimit, you could store DutyLimit in R1 and trigger the HLC to move the contents of R1 into R0.

    I'm not sure how to check whether R0 <= DutyLimit with the CLB alone. What are you doing this check for? Perhaps there is another way to achieve the same result without doing this check.

    Thank you,

    Luke

  • 0 in reply to Luke Jones
    Intellectual 375 points

    Hi Luke,

    This is the requirement from our HW engineers. They don't want to turn the energy off completely while error, otherwise we have same problem when turning on again.

    Can we combine with other modules to make the comparision in this case?

    Regards,

    Quy

  • 0 in reply to Quy Nguyen
    TI__Mastermind 28580 points

    To clarify, you want the duty to always be atleast some minimum?

    You could do this by ORing the output with another PWM or CLB counter output that has your minimum duty.

    Let me know if this approach might work for you.

    --Luke