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TMS320F28379D: F28379D: Flash

ENES TASTEKIN
Prodigy 120 points

Part Number: TMS320F28379D

Tool/software:

Hello,

I transferred my project from RAM to FLASH memory. During my tests, I am debugging while the project is in FLASH memory. During this process, some variables appear as +Inf, but other variables defined in the same way and undergoing the same processes work normally.

Additionally, when I load the system into FLASH, reset the system, and run it directly without DEBUG mode, the system works correctly. What could be the problem here? Did I make a wrong assignment while configuring the FLASH memory? Can you help me with this?



MEMORY
{

RAMM0 : origin = 0x000123, length = 0x0002DD
RAMM1 : origin = 0x000400, length = 0x0003F8
CLATOCPU_MSGRAM : origin = 0x001480, length = 0x000080
CPUTOCLA_MSGRAM : origin = 0x001500, length = 0x000080
RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMLS3 : origin = 0x009800, length = 0x000800
RAMLS_4_5 : origin = 0x00A000, length = 0x001000
RAMD0 : origin = 0x00B000, length = 0x000800
RAMD1 : origin = 0x00B800, length = 0x000800
RAMGS0 : origin = 0x00C000, length = 0x001000
RAMGS1 : origin = 0x00D000, length = 0x001000
RAMGS2 : origin = 0x00E000, length = 0x001000
RAMGS3 : origin = 0x00F000, length = 0x001000
RAMGS4 : origin = 0x010000, length = 0x001000
RAMGS5 : origin = 0x011000, length = 0x001000
RAMGS6 : origin = 0x012000, length = 0x001000
RAMGS7 : origin = 0x013000, length = 0x001000
RAMGS8 : origin = 0x014000, length = 0x001000
RAMGS9 : origin = 0x015000, length = 0x001000
RAMGS10 : origin = 0x016000, length = 0x001000
RAMGS11 : origin = 0x017000, length = 0x001000
RAMGS12 : origin = 0x018000, length = 0x001000
RAMGS13 : origin = 0x019000, length = 0x001000
RAMGS14 : origin = 0x01A000, length = 0x001000
RAMGS15 : origin = 0x01B000, length = 0x000FF8
CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
FLASHA : origin = 0x080000, length = 0x002000
FLASHB : origin = 0x082000, length = 0x002000
FLASHC : origin = 0x084000, length = 0x002000
FLASHD : origin = 0x086000, length = 0x002000
FLASHE : origin = 0x088000, length = 0x008000
FLASHF : origin = 0x090000, length = 0x008000
FLASHG : origin = 0x098000, length = 0x008000
FLASHH : origin = 0x0A0000, length = 0x008000
FLASHI : origin = 0x0A8000, length = 0x008000
FLASHJ : origin = 0x0B0000, length = 0x008000
FLASHK : origin = 0x0B8000, length = 0x002000
FLASHL : origin = 0x0BA000, length = 0x002000
FLASHM : origin = 0x0BC000, length = 0x002000
FLASHN : origin = 0x0BE000, length = 0x001FF0
RESET : origin = 0x3FFFC0, length = 0x000002
}


SECTIONS
{
//
// C28x Sections
//
.reset : > RESET, TYPE = DSECT /* not used, */
codestart : > 0x080000
.text : >> FLASHB | FLASHC | FLASHD | FLASHE,
ALIGN(8)
.TI.ramfunc : LOAD > FLASHD,
RUN > RAMD0,
TABLE(BINIT),
LOAD_START(loadStart_ramfunc),
LOAD_END(loadEnd_ramfunc),
LOAD_SIZE(loadSize_ramfunc),
RUN_START(runStart_ramfunc),
RUN_END(runEnd_ramfunc),
RUN_SIZE(runSize_ramfunc),
ALIGN(8)
.binit : > FLASHA,
ALIGN(8)
.ovly : > FLASHA,
ALIGN(8)
.cinit : > FLASHA,
ALIGN(8)
.stack : > RAMM1
.init_array : > FLASHB,
ALIGN(8)
.bss : > RAMLS2
.const : >> FLASHF | FLASHG | FLASHH,
ALIGN(8)
.data : >> RAMGS0 | RAMGS1 | RAMGS2 | RAMLS2 | RAMLS3
.switch : > FLASHA,
ALIGN(8)
.sysmem : > RAMLS2
Cla1Prog : LOAD > FLASHD,
RUN > RAMLS_4_5,
TABLE(BINIT),
LOAD_START(loadStart_cla1Prog),
LOAD_END(loadEnd_cla1Prog),
LOAD_SIZE(loadSize_cla1Prog),
RUN_START(runStart_cla1Prog),
ALIGN(8)
.const_cla : LOAD > FLASHB,
RUN > RAMLS1,
TABLE(BINIT),
LOAD_START(loadStart_claConst),
LOAD_SIZE(loadSize_claConst),
RUN_START(runStart_claConst),
ALIGN(8)
.scratchpad : > RAMLS1
.bss_cla : > RAMLS1
cla1ToCpuMsgRAM : > CLATOCPU_MSGRAM
cpuToCla1MsgRAM : > CPUTOCLA_MSGRAM

//
// User Sections
//
userSection1 { *(controlVariables) } >> RAMLS0 | RAMLS1
userSection4 { *(SHARERAMGS4) } > RAMGS4
userSection6 { *(SHARERAMGS5) } > RAMGS5
MSGRAM_CPU1_TO_CPU2 : > CPU1TOCPU2RAM, type=NOINIT
MSGRAM_CPU2_TO_CPU1 : > CPU2TOCPU1RAM, type=NOINIT

}

#endif

/*
//===========================================================================
// End of file.
//===========================================================================
*/

Best Regards,

Enes

  • 0
    TI__Guru* 83050 points

    Enes,

    From the map file you have set up the .cmd to do a boot init of your load to flash/run from RAM sections, copying the flash to RAM as part of the boot up vs manually executing a mem_copy in your application.

    I think the issue when the debugger is connected is that CCS is trying to "help" by going directly to main vs the complete boot up flow that would happen when you are in standalone.  This is skipping the boot init, etc and making things not work as it should.

     We need to emulate flash boot when the debugger/CCS is connected.  After you load your program, try the following:

    1)Perform a CPU Reset

    2)Under Scripts there should be a EMUBoot item, hover over this and pick "flash boot"

    3)Run

    This should mimic exactly what happens in standalone, which is working, and hopefully fix your issue.

    Best,

    Matthew