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TMS320F2800132: Interupt during flash ECC error test

Manu36
Expert 1360 points

Part Number: TMS320F2800132

Tool/software:

Dear Support team,

I try to integrate flash ECC error test (at startup and during runing) in a motor control software based on universal motor control example.

Source code for the flash ECC error test is from f280013x\examples\sdl_ex_flash_ecc_test\sdl_ex_flash_ecc_test.c.

I have an issue when the main motor control ISR fire during the ECC error test, in that case motor control ISR is abnormally long and at the end the WDOG reset.

I didn't see any code in the motor control ISR which can loop, up to now, I don't understand why the motor control ISR is so long in that case.

Changing the code to wait end of the motor control ISR before doing the ECC error test solve the issue but I want to know if it is a normal behavior or not?

Is there a part of the ECC error test code that we should protect from other interupts?

Regards.

  • 0
    TI__Expert 5065 points

    Hi Manu 

    The expert for this topic is currently on vacation. Please expect a response after June 26.

    Thank you

    Amir Hussain

  • 0 in reply to Amir Hussain
    Expert 1360 points

    OK,

    I do some more test today.

    first, I probably need to give more info :

    motor control ISR is executed from RAM

    Test are performed in debug mode.

    Based on the test I made, it seems like there are several issue.

    First one is that sometimes, the nmiISR from the flast ECC test example is continuously fired. This is why the motor control ISR was in that case abnormaly long.

    I temporarly fix this by disabling interupt while ECC test mode is activated (I read somewhere that it was not possible to execute code from RAM during test mode, can you confirm)?

    Now the second issue is that it seems I have sometimes an ITRAP just after reenabling cache and prefetch, this seems also dependent of the code I place juste after reenabling this.

    Ihope this can help.

  • 0 in reply to Manu36
    Expert 1360 points

    I finnaly disable interupts during all the test to get it work without any issue.

    So from the example, I add DINT just before Flash_disableCache(FLASH0CTRL_BASE); and EINT just after Flash_enablePrefetch(FLASH0CTRL_BASE);

    I would like to undestood what's happen and if there are some possible workaround.

    Regards.

  • 0 in reply to Manu36
    TI__Guru* 87155 points

    Hi Manu,

    I am asked to review this thread for you. I can review early next week and get back to you.

    Thanks and regards,
    Vamsi

  • 0 in reply to Vamsi Gudivada
    Expert 1360 points

    Thank for reviewing this.

    Regarding the issue below:

    Manu36 said:
    Now the second issue is that it seems I have sometimes an ITRAP just after reenabling cache and prefetch, this seems also dependent of the code I place juste after reenabling this.

    I saw the issue at different location in my code where by just adding some code before where the issue occurs, the issue disappears. Based on this FAQ:

    https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/951658/faq-faq-for-flash-ecc-usage-in-c2000-devices---includes-ecc-test-mode-linker-ecc-options

    I saw the cmd files (from universal motor control example) has the .text section which was ALIGN(4) instead of ALIGN(8), changing to ALIGN(8) let me remove the unnecessary code which was added. 

  • 0 in reply to Manu36
    TI__Guru* 87155 points

    Hi Manu,

    Are you saying that the issue is resolved after changing to ALIGN(8)?

    Thanks and regards,
    Vamsi

  • 0 in reply to Vamsi Gudivada
    Expert 1360 points

    it seems both issue are fixed,

    I just maintain disabling ISR when ECC test mode is activated to prevent code execution from flash during test mode is activated. Can you please just confirm it is mandatory?

    During the past few days the issues was not constant, sometimes disapearing when debug code was added so I'm not 100% sure it totally disapear. I can confirm in a few days.

    Regards.  

  • 0 in reply to Manu36
    TI__Guru* 87155 points

    Hi Manu,

    Sure, you can come back as needed with your new questions (please open a new post for easy tracking).

    I don't think it is mandatory to prevent flash execution during test mode on this device.  I will ask our flash applications owner to confirm for you.

    Thanks and regards,

    Vamsi

  • 0 in reply to Vamsi Gudivada
    TI__Genius 11081 points

    Hello Manu36,

    The current recommendation we have is:

    • Make sure buffer/cache mechanisms are disabled while performing a diagnostic test.
    • Do not write to Flash registers while executing code from Flash.

    I do not see an explicit prohibition of Flash execution during ECC test mode, but if I were writing the code I would avoid that condition.

    Best regards,
    Ibukun