Tool/software:
Definition: Bank0, Bank1 is for CPU1, Bank4 is for CPU2.
Step1: DSP run, on this condition, CPU1 can operate bank1 R/W bank1. CPU2 can' see bank1.
Step2: Use register BANKMUXSEL to let CPU2 can access bank1. Then CPU2 can access bank1 in debug window. but CPU2 can't erase or write bank1. what other register need to be set too? This issue blocks our design.
