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TMS320F28384S: Missing pulse with phase shift

Part Number: TMS320F28384S

Tool/software:

Hi,

I'm running a converter with a phase shift between ePWM1 and ePWM4, each having a 0.5 duty cycle using up-down count. The phase is changing from 0 to 180 degrees.

However, I encountered an issue of missing pulses on ePWM3 at specific phases.

To resolve this issue, I've attempted to implement T1/T2 events on ePWM3, but I couldn't find out how to properly use T1/T2 events.

I would appreciate any advice.

Here is my code:

void updatePhase(int16 ch, float32 phase)
{
    while(phase > 360.0) phase -= 360.0;
    while(phase < 0.0) phase += 360.0;

    if(phase > 180.0) {
        phase -= 360.0;
    }

    if(phase == 0.0)  {
        ePWM_Regs[ch]->TBPHS.bit.TBPHS = 0;
    }
    else if(phase > 0.0){
        ePWM_Regs[ch]->TBCTL.bit.PHSDIR = 0; 
        ePWM_Regs[ch]->TBPHS.bit.TBPHS = (int16)((float32)ePWM_Regs[ch]->TBPRD * phase * 0.00555555); // 0.00277778 = 1/360
    }
    else{ // phase < 0.0
        ePWM_Regs[ch]->TBCTL.bit.PHSDIR = 1; 
        ePWM_Regs[ch]->TBPHS.bit.TBPHS = (int16)((float32)ePWM_Regs[ch]->TBPRD * -phase * 0.00555555); // 0.00277778 = 1/360
    }

}

void updateDuty_Sym(Uint16 ch, float32 duty)
{
    ePWM_Regs[ch]->CMPA.bit.CMPA = (Uint32)((float32)ePWM_Regs[ch]->TBPRD * duty);
    ePWM_Regs[ch]->CMPB.bit.CMPB = (Uint32)((float32)ePWM_Regs[ch]->TBPRD * (1-duty));
}

void conf_ePWM_Sym(Uint16 ch, float32 freq)
{
    // Set actions
    ePWM_Regs[ch]->AQCTLA.bit.CAD = AQ_SET;
    ePWM_Regs[ch]->AQCTLA.bit.CAU = AQ_CLEAR;
    ePWM_Regs[ch]->AQCTLB.bit.CBD = AQ_SET;
    ePWM_Regs[ch]->AQCTLB.bit.CBU = AQ_CLEAR;

    if(ch==4){
        ePWM_Regs[ch]->TBCTL.bit.PHSEN = TB_DISABLE;
        ePWM_Regs[ch]->EPWMSYNCOUTEN.bit.ZEROEN = 0x1;
        ePWM_Regs[ch]->TBCTL.bit.SYNCOSEL = 0x1;    //TB_CTR_ZERO;

        ePWM_Regs[ch]->TBPHS.bit.TBPHS = 0;

    }
    else if(ch!=4) {
        ePWM_Regs[ch]->TBCTL.bit.PHSEN = TB_ENABLE;
        ePWM_Regs[ch]->EPWMSYNCINSEL.bit.SEL = 0x4;
        ePWM_Regs[ch]->TBCTL.bit.SYNCOSEL = 0x1;    //TB_SYNC_IN;

    }

    SyncSocRegs.SYNCSELECT.bit.SYNCOUT = 0x1;

    // Setup TBCLK
    ePWM_Regs[ch]->TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up-down
    ePWM_Regs[ch]->TBCTL.bit.PRDLD = TB_SHADOW;
    ePWM_Regs[ch]->TBCTL.bit.HSPCLKDIV = TB_DIV1;

    ePWM_Regs[ch]->CMPCTL.bit.SHDWAMODE = CC_SHADOW;    // Load registers every ZERO
    ePWM_Regs[ch]->CMPCTL.bit.SHDWBMODE = CC_SHADOW;
    ePWM_Regs[ch]->CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
    ePWM_Regs[ch]->CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

    ePWM_Regs[ch]->DBCTL.bit.IN_MODE = DBA_RED_DBB_FED;
    ePWM_Regs[ch]->DBCTL.bit.POLSEL = DB_ACTV_HIC;
    ePWM_Regs[ch]->DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;    //deadtime

    updateDuty_Sym(ch, 0.0);
    updatePhase(ch, 0.0);
    updateFreq(ch, freq);
    updateDeadtime(ch, 0.0);
}

 

  • Hi Donghyuk Lee,

    In order to configure the T1/T2 events, you'll need to configure the action of what will happen when a T1 or T2 event occurs in the AQCTLA2 register bits of T1D, T1U etc. You will need to configure the AQTSRCSEL register to define what the source of T2SEL and T1SEL will be. 

    DCxEVT1/2, can be configured in the digital compare logic submodule.

    Best,

    Ryan Ma