TMS320F28388D: CLB_OUTPUT_COND_CONTROL_x Field Description Question

Hi Ed,

I am confirming this with someone else on our team more familiar with the register format, I should get back to you tomorrow.

Thank you,

Luke

Hi Ed,

This may be an issue with the register description. There should be no restriction in writing this bit to a 0. Could you try this in the register window and let me know if you're able to set this bit to a 0?

Thank you,

Luke

Hi Luke,

All of the CLB_OUTPUT_COND_CTRL_x registers are already 0.  Using the Registers tab, I attempted to write CLB_OUTPUT_COND_CTRL_4 and set everything to a 1.  The result was still 0s, even with multiple clicks of the Refresh button.

Thank you,

Ed

Hi Ed,

When configuring the AOC in SysConfig I was able to write to this bit:

Not sure why this bit would not be writable over jtag. I am not able to set or clear it from the register window but my .c code generate by SysConfig has no issues with this. Regardless I think the register description needs to be updated to get rid of the W1C. I'll look into the register window issue and let you know my findings.

Thank you,

Luke

Hi Luke,

I had a similar experience.  When I used my code to load the register, it loaded without a problem.  So it does seem to be a register window issue.

Regards,

Ed

Hi Ed,

The issue could be due to the CLB clock not being disabled when attempting to write to the register, not an issue with the register window itself, I will test this and get back to you.

Thank you,

Luke

OK.  That makes sense.

Thank you Luke,

Ed