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Shorter sequence on the F28335 ADC

Philippe Akira Shiraishi
Prodigy 40 points


Hi folks,

 I am using the ADC on a F28335 to sample 1 channel in a timing-critical application running at 500 kHz. I just need a single reading of the A0 channel (i.e. MAXCONV = 0). However, when the ADC is triggered by a EPWMxSOCA event, it goes through 8 acquisitions (CONV00 to CONV07) of the A0 channel before issuing a EOS interrupt, at which point I know that I can safely use the conversion result in ADCRESULT0. But just to obtain 1 sample, I have to wait until the sequencer arrives at CONV07.

I read in the ADC guide that "Once triggered, the sequencer cannot be stopped/halted in mid sequence. The program must either wait until an end-of-sequence (EOS) or initiate a sequencer reset, which brings the sequencer immediately back to the idle start state (CONV00 for SEQ1 and cascaded cases; CONV08 for SEQ2)."

Is there any possibility to specify a SHORT sequence of 1 channel? Or use brute-force by resetting the ADC sequencer after a fixed amount of time (still have to determine that right amount of time though....) after the EPWMxSOCA event?

 

Thanks for your help!

 

Akira

  • 0
    TI__Guru* 81500 points

    Akira,

    Actually with the settings you have described the ADC should be issuing the ISR after the 1st conversion.  The ISR will be issued after the last conversion in the MAXCONV sequence is complete.

    However, the ADC itself will continue to respond to ePWM triggers that are coming in, such that the ADCRESULT1/2/3 etc will get populated every 500kHz or every 2us.  You will need to factor that in with how long it takes you to get into the ISR from your code.  Given that ADCISR is one of the high priority ISRs, there shouldn't really be anything pre-empting it; so you should get to the ADCISR well before the next PWM trigger.

    How are you determining that the ADC is not triggering the ISR until the 8th conversion, profiling or CPUTIMER?  In your ADC ISR I would disable the PWM to SOC trigger and observe how many Results are populated(from reset).  This will give us some indication of the latency for servicing the ISR.

    Best,

    Matthew

  • 0 in reply to MatthewPate
    Prodigy 40 points

    Matthew,

     

    Thanks a lot for your reply. Your trick (disabling the PWM SOC trigger from the ADCISR) solved my "timing" issue (which was more a "comprehension" issue in the end ^^).

     

    Akira