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TMS320F28384D: The SPI DMA Transfers

Part Number: TMS320F28384D

Tool/software:

Hi champs,

In TRM section 37.3.8.1, the example of Transmitting Data Using SPI with DMA, to transfer 128 words to SPI using the DMA as below,

  • NUM_WORDS: 128
  • TXFFIL: 8
  • DMA_TRANSFER_SIZE: (NUM_WORDS /TXFFIL) – 1 = (128/8) – 1 = 15 (16 transfers)
  • DMA_BURST_SIZE: (16 – TXFFIL) – 1 = (16 – 8) – 1 = 7 (8 words per burst)

The result above is correct. However, this calculation seems cannot be used when TXFFIL is less than 8. For example, when we want to transfer 20 words and decide the TXFFIL is 5, then we get below results by using this calculation,

  • DMA_TRANSFER_SIZE: (NUM_WORDS /TXFFIL) – 1 = (20/5) – 1 = 3 (4 transfers)
  • DMA_BURST_SIZE: (16 – TXFFIL) – 1 = (16 – 5) – 1 = 10 (11 words per burst)

The result is incorrect and it can be corrected by using DMA_BURST_SIZE = TXFFIL - 1 = 4 (5 words per burst). Is this correct or I misunderstand somethings?

Another question is that the SPITXINT is generated when TXFFST is less than or equal to TXFFIL, but the SPITXDMA activates when TXFFST is less than TXFFIL. Is this correct and means that the SPI TX interrupt and SPITXDMA are issued at different conditions? And, the SPI RX interrupt and SPIRXDMA occurs at same condition, when RXFFST is greater than or equal to RXFFIL?

Please advise, thanks for your help.

Regards,

Luke

  • Hi Luke,

    You are correct, the equation should be as follows for DMA_TRANSFER_SIZE:

    • DMA_TRANSFER_SIZE: (NUM_WORDS /(16 - TXFFIL)) – 1

    I will make sure this gets corrected in the TRM.

    The SPI TX will trigger the DMA whenever it has some number of words empty. The of words empty is what we care about with the DMA because when the DMA is triggered to transfer a burst of words, we want to make sure there are at least that many spots empty in the TX FIFO to avoid overwriting data. The same condition will trigger the SPI TX interrupt, where that specific number of words can be written to the FIFO inside the ISR. So, if you want to use a burst size of 5 words, you want to trigger the DMA whenever there are at least 5 empty spots in the FIFO. The TXFIL value refers to the amount full, so you would use a TXFIL value of 16 - 5 = 11 words to trigger the DMA since:

    Greater than or equal to 5 words empty = Less than or equal to 11 words full

    You have to write the DMA transfer size - 1 and burst size - 1 to the TRANSFER_SIZE and BURST_SIZE registers, which is where the - 1 comes from. So, the math would be as follows in your case:

    • NUM_WORDS: 20
    • TXFFIL: 11
    • DMA_TRANSFER_SIZE: (NUM_WORDS /(16 - TXFFIL)) = (20/5) = 4 bursts per transfer <- write 3 to TRANSFER_SIZE register
    • DMA_BURST_SIZE: (16 – TXFFIL)  = (16 – 11) = 5 words per burst <- write 4 to BURST_SIZE register

    For the SPI RX condition, it's a little simpler. The trigger will happen when there are at least some number of words present in the FIFO. RXFIL also refers to the amount full (same as TXFIL), so the values used here are the same. The math is as below for RX:

    • NUM_WORDS: 20
    • RXFFIL: 5
    • DMA_TRANSFER_SIZE: (NUM_WORDS /RXFFIL) = (20/5) = 4 bursts per transfer <- write 3 to TRANSFER_SIZE register
    • DMA_BURST_SIZE: (RXFFIL)  = (5) = 5 words per burst <- write 4 to BURST_SIZE register

    Let me know if you have any further questions.

    Best Regards,

    Delaney

  • Hi Delaney,

    Thanks for the correction of equation, I agree that the TX and RX DMA configuration examples you mentioned will work well.

    in TRM section 37.2.4 DMA Support, we say SPITXDMA activates when TXFFST is less than the interrupt level (TXFFIL), will also check Figure 37-3 SPI DMA Trigger Diagram.

    In section 37.3.7 SPI FIFO Description, the bullet item 9, we say the transmit interrupt (SPITXINT) is generated whenever the transmit FIFO status bits (TXFFST) match (less than or equal to) the interrupt trigger level bits (TXFFIL).

    My question is that according to the descriptions in TRM, does it mean the generation condition(timing) of SPITXDMA and SPITXINT is different? Is this correct please?

    Regards,

    Luke

  • Hi Luke,

    I can verify with the design team, but it is my understanding that the SPI module uses the same condition to trigger the TX DMA and the TX FIFO interrupt. If there are for example exactly 8 bytes present in the TX FIFO and the FIFO level is set to 8, then the DMA should trigger and be able to move 8 characters over since there 8 available spots. Either way, this shouldn't have an effect on any code. Even if the DMA is triggered slightly later due to waiting for only 7 bytes present (less than 8), it is still able to write 8 characters to the FIFO on that condition without an overrun occuring.

    Best Regards,

    Delaney