LAUNCHXL-F280039C: spi_ex5_loopback_dma example

Hello,

The expert on this topic is currently out of office until Tuesday 9/3, so please expect a delayed response. I apologize for any inconvenience.

Best Regards,
Delaney

Hi Leo,

Apologies for the delay. Does the example work as is when you don't modify the example and using the launch pad build configuration only? In other words, import the example from C2000Ware, modify the build configuration highlighted below (CPU1_LAUNCHXL_RAM), and run the example. On my end, I am not seeing the issue you are observing. 

Best Regards,

Aishwarya

Hello Aishwarya,

I did as you suggested, not a single change to the code.

As before, the RX interrupt is called but the buffer only shows zero’s and the check inside the RX interrupt fails.

Attaching picture.

Let me know if this is what you see, or what to do next.

Thank you.

Leo,

What CCS Eclipse and C2000Ware are you using? If possible, please use the latest versions and see if this issue goes away. If not, I can try to replicate the issue on my end.

Best Regards,

Aishwarya

Code Composer Studio
Version: 12.6.0.00008

OS: Windows 10, v.10.0, x86_64 / win32
Java vendor: Eclipse Adoptium
Java runtime version: 11.0.13+8
Java version: 11.0.13

C2000Ware_5_02_00_00

Leo,

Let me get back to you tomorrow after replicating it on my end.

Best Regards,

Aishwarya

Hi Leo,

I have confirmed this example has already been fixed in the released C2000Ware 5.03.

Best Regards,

Aishwarya

Hello Aishwarya,

I have confirmed that the example works in C2000Ware 5.03. Thank you.

As I mentioned at the start of the chat, the desired implementation will use SPI DMA in slave mode. Now that this example works as master, I will try to modify it to work as slave and compile it for the f280037, the intended platform. I would prefer to leave this ticket open a while longer in case I have need of more assistance. Let me know if this is acceptable to you. Thanks.

Leo,

Sounds good.

Best Regards,

Aishwarya

Hi Aishwarya,

I am seeing an issue when running SPI DMA Slave at 7.5 Mbits. The data sometimes gets skewed. This happens randomly. What might cause this? 

The picture attached shows two logic analizer captures, one above, one below it. The value in the capture below is correct. The correct value for Miso is 0xFF01. 

As you can see in the capture above, the value for Miso shows 0x7F01 instead of 0xFF01. The same data is being sent continuously using two buffers that are alternating. Let me know if you know what might be going on. 

Thanks. 

Leo,

What is the difference in SPI configuration between the two captures? Ensure clock polarity / phase is consistent across devices.

Best Regards,

Aishwarya

Hello Aishwarya,

I have moved to using our hardware with driverlib. The issue is not the cpol, cpha configuration.

Do you know which trigger I should be using for dma if running in slave mode? I did not see a chip select trigger in the dma trigger list in dma.h.

Leo,

Leo Mandujano said:

Do you know which trigger I should be using for dma if running in slave mode?

DMA trigger is more so dependent on the SPI TX or RX, so they can be used as already used in example. Can you please clarify if you are referring to something else?

Best Regards,

Aishwarya

Hi Aishwarya, I did not see a slave dma example. Let me know if you do have one. My first attempt was to use the SPIBRX but I see a byte delay on the transmit side depending on the number of bytes set to trigger. I was hoping to trigger based on a chip select enable. I need the transmit and the receive to be the same number of bytes and be synchronized with the receive clock. Any thoughts? Thanks.

I found an alternative that may work. So disregard my previous post. I'll let you know if I run into any new issues. Thanks.

Leo,

Thanks for the update. Please do share your findings afterwards. 

Best Regards,

Aishwarya

Sure. Thanks!