TMS320F280039C: ADC SOC change

Hello,

The expert on this topic is currently out of office until Tuesday 9/3, so please expect a delayed response. I apologize for any inconvenience.

Best Regards,
Delaney

Hi Sangmo,

My assumption based on the limited snippets you have shared with the headers is that only ADCA is converting and that all SOCs (0..3 or more) are mapped using 55khz sampling time.  Now SOC0, which is the first conversion, is changed to higher conversion rate of 550Khz.  This is OK however if all the other SOCs are mapped to ADC channel 10 too, then I do not see the point.  I'm missing other information to make sense of why you are trying to only modify the sampling rate of SOC0.  Maybe you can share more details about SOC to channel mapping and what is the reasoning behind the sampling rate change.

Regards,

Joseph

Hi Joseph.

Thank you for your reply.

I want to fast sensing for output voltage as over 55kHz sampling time.

I make CLA for only output voltage sensing.

All ADC SOC was set as EPWM1. ADC runs every 55kHz.

I am setting EPWM8 as 550kHz, EPWM output is not used.

CLA trigger source use EPWM8.

I want to change only output voltage sensing SOC to EPWM8 form EPWM1.

If I can change output voltage sensing SOC, I think that ADC for output voltage sensing run in CLA every 550kHz.

Is it possible? And Could you check below setup?

-. CLA setup

void PSFB_HAL_setupCLA(void)
{
//
// setup CLA to register an interrupt
//
#if ADC_CLA // 240828 CLA
memcpy((uint32_t *)&Cla1ProgRunStart, (uint32_t *)&Cla1ProgLoadStart,
(uint32_t)&Cla1ProgLoadSize );
memcpy((uint32_t *)&Cla1ConstRunStart, (uint32_t *)&Cla1ConstLoadStart,
(uint32_t)&Cla1ConstLoadSize );

// first assign memory to CLA
//
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS0, MEMCFG_LSRAMMASTER_CPU_CLA1);
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS1, MEMCFG_LSRAMMASTER_CPU_CLA1);
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS2, MEMCFG_LSRAMMASTER_CPU_CLA1);
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS3, MEMCFG_LSRAMMASTER_CPU_CLA1);
MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS4, MEMCFG_LSRAMMASTER_CPU_CLA1);
//MemCfg_setLSRAMMasterSel(MEMCFG_SECT_LS5, MEMCFG_LSRAMMASTER_CPU_CLA1);

MemCfg_setCLAMemType(MEMCFG_SECT_LS0, MEMCFG_CLA_MEM_DATA);
MemCfg_setCLAMemType(MEMCFG_SECT_LS1, MEMCFG_CLA_MEM_DATA);
MemCfg_setCLAMemType(MEMCFG_SECT_LS2, MEMCFG_CLA_MEM_PROGRAM);
MemCfg_setCLAMemType(MEMCFG_SECT_LS3, MEMCFG_CLA_MEM_PROGRAM);
MemCfg_setCLAMemType(MEMCFG_SECT_LS4, MEMCFG_CLA_MEM_PROGRAM);
//MemCfg_setCLAMemType(MEMCFG_SECT_LS5, MEMCFG_CLA_MEM_PROGRAM);

//
// Suppressing #770-D conversion from pointer to smaller integer
// The CLA address range is 16 bits so the addresses passed to the MVECT
// registers will be in the lower 64KW address space. Turn the warning
// back on after the MVECTs are assigned addresses
//
#pragma diag_suppress = 770

CLA_mapTaskVector(CLA1_BASE, CLA_MVECT_1, (uint16_t) &Cla1Task1);
//CLA_mapTaskVector(CLA1_BASE , CLA_MVECT_2, (uint16_t)&Cla1Task2);
//CLA_mapTaskVector(CLA1_BASE , CLA_MVECT_3, (uint16_t)&Cla1Task3);
//CLA_mapTaskVector(CLA1_BASE , CLA_MVECT_4, (uint16_t)&Cla1Task4);
//CLA_mapTaskVector(CLA1_BASE , CLA_MVECT_5, (uint16_t)&Cla1Task5);
//CLA_mapTaskVector(CLA1_BASE , CLA_MVECT_6, (uint16_t)&Cla1Task6);
//CLA_mapTaskVector(CLA1_BASE , CLA_MVECT_7, (uint16_t)&Cla1Task7);

#pragma diag_warning = 770

CLA_enableIACK(CLA1_BASE);
CLA_enableTasks(CLA1_BASE, CLA_TASKFLAG_1);

CLA_setTriggerSource(CLA_TASK_1, PSFB_PWM8_CLA_INT);
PSFB_HAL_enablePWMInterruptGeneration_CLA(PSFB_PWM8_CLA_BASE);

-. CLA function

__attribute__((interrupt)) void Cla1Task1 ( void )
{
GPIO_writePin(AC_FAIL, 1);

filter1Result[n_CLA++] = (int32_t)PSFB_LVBUS_FB;

if(n_CLA >= MAX_SAMPLES_CLA)
{
n_CLA=0;
}

GPIO_writePin(AC_FAIL, 0);
PSFB_HAL_clearPWMInterruptFlag(PSFB_PWM8_CLA_BASE);
}

- ADC SOC Trigger setup

PSFB_HAL_setupADCSOCTrigger_CLA(PSFB_PWM8_CLA_BASE); // 240828 CLA

- EPWM8 setup

void PSFB_HAL_setupCLAPWM(uint32_t base1, uint16_t pwm_period_ticks)
{
EALLOW;

EPWM_setPeriodLoadMode(base1, EPWM_PERIOD_DIRECT_LOAD);
EPWM_setTimeBasePeriod(base1, pwm_period_ticks - 1);
EPWM_setTimeBaseCounter(base1, 2);
EPWM_setPhaseShift(base1, 2);
EPWM_setTimeBaseCounterMode(base1, EPWM_COUNTER_MODE_UP);
EPWM_setClockPrescaler(base1, EPWM_CLOCK_DIVIDER_1, EPWM_HSCLOCK_DIVIDER_1);

EPWM_enablePhaseShiftLoad(base1);

HRPWM_setSyncPulseSource(base1, HRPWM_PWMSYNC_SOURCE_COMPC_UP);
EPWM_setCounterCompareValue(base1, EPWM_COUNTER_COMPARE_C,
pwm_period_ticks - 5);

EDIS;
}

Sangmo Kim.