TMS320F28335: Setting the TBPRD EPWM value by sending it serially through my python code.

#include "DSP2833x_Device.h"
#include <string.h>
#include <stdlib.h> // new addition

// External Function prototypes
extern void InitSysCtrl(void);
extern void InitPieCtrl(void);
extern void InitPieVectTable(void);


// Prototype statements for functions found within this file.
void Gpio_select(void);
void Setup_ePWM1(void); // new addition
void Setup_ePWM2(void); // new addition
void SCIA_init(void);
interrupt void SCIA_TX_isr(void);    // SCI-A Transmit Interrupt Service
interrupt void SCIA_RX_isr(void);    // SCI-A Receive  Interrupt Service

//interrupt void cpu_timer0_isr(void); // new addition

// Global Variables
char message[]={"2000! \n\r"};
char buffer[4];
//char buffer[];
//int i;
Uint32 TPWM; //1500(100K)
//###########################################################################
//                      main code
//###########################################################################
void main(void)
{
//    int counter=0;  // (new addition) binary counter for digital output

    InitSysCtrl();  // Basic Core Initialization
                    // SYSCLK=150MHz, HISPCLK=75MHz, LSPCLK=37.5MHz
    EALLOW;
    SysCtrlRegs.WDCR= 0x00AF;         // Re-enable the watchdog
    EDIS;           // 0x00E8  to disable the Watchdog , Prescaler = 1
                    // 0x00AF  to NOT disable the Watchdog, Prescaler = 64

    Gpio_select();  // GPIO9, GPIO11, GPIO34 and GPIO49 as output
                    // to 4 LEDs at Peripheral Explorer

    Setup_ePWM1();     // init  ePWM1A,B // new addition

    Setup_ePWM2();     // init  ePWM2A,B // new addition

    InitPieCtrl();      // default status of PIE; in DSP2833x_PieCtrl.c

    InitPieVectTable(); // init PIE vector table; in DSP2833x_PieVect.c

    // re-map PIE - entry for SCI-A-TX and SCI-A-RX
    EALLOW;
//    PieVectTable.TINT0 = &cpu_timer0_isr; // new addition
    PieVectTable.SCITXINTA = &SCIA_TX_isr;
    PieVectTable.SCIRXINTA = &SCIA_RX_isr;
    EDIS;

//    InitCpuTimers();    // basic setup CPU Timer0, 1 and 2 (new addition)

//    ConfigCpuTimer(&CpuTimer0,150,100000); // (new addition)

    SCIA_init();  // Initalize SCI

//    PieCtrlRegs.PIEIER1.bit.INTx7 = 1;  // Enable CPU Timer 0 INT (new addition)
    // Enable SCI-A TX Interrupt Group9 interupt 2
    PieCtrlRegs.PIEIER9.bit.INTx2 = 1;
    // Enable SCI-A RX Interrupt Group9 interupt 1
    PieCtrlRegs.PIEIER9.bit.INTx1 = 1;


    // Enable INT9 for SCIA-TX and SCIA-RX:
    IER = 0x100; //(original)
//    IER = 0x101; // new addition

    // Enable global Interrupts and higher priority real-time debug events:
    EINT;   // Enable Global interrupt INTM
    ERTM;   // Enable Global realtime interrupt DBGM

    while(1)
    {

//        while(CpuTimer0.InterruptCount == 0); // (new addition)
//                   CpuTimer0.InterruptCount = 0; // (new addition)


        EALLOW;
        SysCtrlRegs.WDKEY = 0x55;           // Service watchdog #1
        SysCtrlRegs.WDKEY = 0xAA;           // Service watchdog #2
        EDIS;

//        counter++; // (new addition)
//        if(counter&1) GpioDataRegs.GPASET.bit.GPIO9 = 1; // (new addition)
//             else GpioDataRegs.GPACLEAR.bit.GPIO9 = 1; // (new addition)
//        if(counter&2) GpioDataRegs.GPASET.bit.GPIO11 = 1; // (new addition)
//             else GpioDataRegs.GPACLEAR.bit.GPIO11 = 1; // (new addition)
//        if(counter&4) GpioDataRegs.GPBSET.bit.GPIO34 = 1; // (new addition)
//            else GpioDataRegs.GPBCLEAR.bit.GPIO34 = 1; // (new addition)
//        if(counter&8) GpioDataRegs.GPBSET.bit.GPIO49 = 1; // (new addition)
//             else GpioDataRegs.GPBCLEAR.bit.GPIO49 = 1; // (new addition)


    }
}

void Gpio_select(void)
{
    EALLOW;
    GpioCtrlRegs.GPAMUX1.all = 0;           // GPIO15 ... GPIO0 = General Puropse I/O
    GpioCtrlRegs.GPAMUX2.all = 0;           // GPIO31 ... GPIO16 = General Purpose I/O

    GpioCtrlRegs.GPAMUX2.bit.GPIO28 = 1;    // SCIRXDA
    GpioCtrlRegs.GPAMUX2.bit.GPIO29 = 1;    // SCITXDA

    GpioCtrlRegs.GPBMUX1.all = 0;           // GPIO47 ... GPIO32 = General Purpose I/O
    GpioCtrlRegs.GPBMUX2.all = 0;           // GPIO63 ... GPIO48 = General Purpose I/O
    GpioCtrlRegs.GPCMUX1.all = 0;           // GPIO79 ... GPIO64 = General Purpose I/O
    GpioCtrlRegs.GPCMUX2.all = 0;           // GPIO87 ... GPIO80 = General Purpose I/O

    GpioCtrlRegs.GPADIR.all = 0;
    GpioCtrlRegs.GPADIR.bit.GPIO9 = 1;      // peripheral explorer: LED LD1 at GPIO9
    GpioCtrlRegs.GPADIR.bit.GPIO11 = 1;     // peripheral explorer: LED LD2 at GPIO11

    GpioCtrlRegs.GPBDIR.all = 0;            // GPIO63-32 as inputs
    GpioCtrlRegs.GPBDIR.bit.GPIO34 = 1; // peripheral explorer: LED LD3 at GPIO34
    GpioCtrlRegs.GPBDIR.bit.GPIO49 = 1; // peripheral explorer: LED LD4 at GPIO49

    GpioCtrlRegs.GPCDIR.all = 0;            // GPIO87-64 as inputs
    EDIS;
}

//interrupt void cpu_timer0_isr(void)  // (new addition)
//{                                    // (new addition)
//    CpuTimer0.InterruptCount++; // (new addition)
//    EALLOW;                     // (new addition)
//    SysCtrlRegs.WDKEY = 0xAA;   // service WD #2  (new additon)
//    EDIS;                       // (new addition)
//    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;     // (new addition)
//}                                               // (new addition)



void SCIA_init()
{
    SciaRegs.SCICCR.all =0x0027;    // 1 stop bit,  No loopback
                                    // ODD parity,8 char bits,
                                    // async mode, idle-line protocol
    SciaRegs.SCICTL1.all =0x0003;   // enable TX, RX, internal SCICLK,
                                    // Disable RX ERR, SLEEP, TXWAKE

    // SYSCLOCKOUT = 150MHz; LSPCLK = 1/4 = 37.5 MHz
    // BRR = (LSPCLK / (9600 x 8)) -1
    // BRR = 487  gives 9605 Baud
    SciaRegs.SCIHBAUD    = 487 >> 8;        // Highbyte
    SciaRegs.SCILBAUD    = 487 & 0x00FF;    // Lowbyte

    SciaRegs.SCICTL2.bit.TXINTENA = 1;      // enable SCI-A Tx-ISR
    SciaRegs.SCICTL2.bit.RXBKINTENA = 1;    // enable SCI_A Rx-ISR

    SciaRegs.SCIFFTX.all = 0xC060;  // bit 15 = 1 : relinquish from Reset
                                    // bit 14 = 1 : Enable FIFO
                                    // bit 6 = 1 :  CLR TXFFINT-Flag
                                    // bit 5 = 1 :  enable TX FIFO match
                                    // bit 4-0 :  TX-ISR, if TX FIFO is 0(empty)
    SciaRegs.SCIFFCT.all = 0x0000;  // Set FIFO transfer delay to 0

    SciaRegs.SCIFFRX.all = 0xE064;  // Rx interrupt level = 5

    SciaRegs.SCICTL1.all = 0x0023;  // Relinquish SCI from Reset
}

// SCI-A Transmit Interrupt Service
interrupt void SCIA_TX_isr(void)
{
    unsigned int i;
    // copy 16 character into SCI-A TX buffer
    for(i=0;i<16;i++) SciaRegs.SCITXBUF= message[i];

    // Acknowledge this interrupt to receive more interrupts from group 9
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;
}

// SCI-A Receive Interrupt Service
interrupt void SCIA_RX_isr(void)
{
    int i;
//    char buffer[16];
    for (i=0;i<4;i++) buffer[i]= SciaRegs.SCIRXBUF.all;

    if (strncmp(buffer, "1500", 4) == 0)
    {
        SciaRegs.SCIFFTX.bit.TXFIFOXRESET =1;  // enable TXFIFO
        SciaRegs.SCIFFTX.bit.TXFFINTCLR = 1 ;  // clear interrupt to allow interrupt

// MODIFIED SECTION

        //Convert chars to correct integer values
        Uint32 val1 = buffer[0] - '0';
        Uint32 val2 = buffer[1] - '0';
        Uint32 val3 = buffer[2] - '0';
        Uint32 val4 = buffer[3] - '0';

        //Multiply digits so we can add all
        val1 = val1 * 1000;
        val2 = val2 * 100;
        val3 = val3 * 10;
        val4 = val4 * 1; //not necessary, but added for completeness

        //Use sum of the values to set the PWM period
        Uint32 period = val1 + val2 + val3 + val4;

        TPWM = period; // (new addition)

// END OF MODIFIED SECTION

        EPwm1Regs.TBPRD = TPWM; // (new addition) 1KHz - PWM signal //1500(100K),1250(120K),1666(90K),1154(130K),1364(110K)
        EPwm1Regs.CMPA.half.CMPA = TPWM/2; // (new addition) 50% duty cycle first
        EPwm1Regs.CMPB = TPWM/2; // (new addition)

        EPwm2Regs.TBPRD = TPWM; // (new addition) 1KHz - PWM signal //1500(100K),1250(120K),1666(90K),1154(130K),1364(110K)
        EPwm2Regs.CMPA.half.CMPA = TPWM/2; // (new addition) 50% duty cycle first
        EPwm2Regs.CMPB = TPWM/2; // (new addition)
        EPwm1Regs.TBCTL.bit.SYNCOSEL = 1;   // (new addition) generate a syncout if CTR = 0
        EPwm2Regs.TBCTL.bit.PHSEN = 1;      // (new addition) enable phase shift for ePWM2
        EPwm2Regs.TBCTL.bit.SYNCOSEL = 0;   // (new addition) syncin = syncout
        EPwm2Regs.TBPHS.half.TBPHS = TPWM; // (new addition) 1/3 phase sh

    }


    SciaRegs.SCIFFRX.bit.RXFIFORESET = 0;   // reset RX-FIFO pointer
    SciaRegs.SCIFFRX.bit.RXFIFORESET = 1;   // enable RX-operation
    SciaRegs.SCIFFRX.bit.RXFFINTCLR = 1;    // clear RX-FIFO INT Flag
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;
}


//===========================================================================
// (new addition in rest of the code for ePWM1 & ePWM2)
//===========================================================================


void Setup_ePWM1(void)
{
    EPwm1Regs.TBCTL.bit.CLKDIV = 0; // CLKDIV = 1
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0; // HSPCLKDIV = 2
    EPwm1Regs.TBCTL.bit.CTRMODE = 2; // up - down mode

    EPwm1Regs.AQCTLA.all = 0x0060; // set ePWM1A on CMPA up, clear ePWM1A on CMPA down
    EPwm1Regs.AQCTLB.all = 0x0600; // set ePWM1B on CMPB up, clear ePWM1B on CMPB down

//      EPwm1Regs.TBPRD = TPWM; // 1KHz - PWM signal //1500(100K),1250(120K),1666(90K),1154(130K),1364(110K)
//      EPwm1Regs.CMPA.half.CMPA = TPWM/2; // 50% duty cycle first
//      EPwm1Regs.CMPB = TPWM/2;
    EPwm1Regs.DBRED = 55; // 10 microseconds delay
    EPwm1Regs.DBFED = 55; // for rising and falling edge
    EPwm1Regs.DBCTL.bit.OUT_MODE = 3; // ePWM1A = RED
    EPwm1Regs.DBCTL.bit.POLSEL = 2; // S3=1 inverted signal at ePWM1B
    EPwm1Regs.DBCTL.bit.IN_MODE = 0; // ePWM1A = source for RED & FED

}

void Setup_ePWM2(void)
{
    EPwm2Regs.TBCTL.bit.CLKDIV = 0; // CLKDIV = 1
    EPwm2Regs.TBCTL.bit.HSPCLKDIV = 0; // HSPCLKDIV = 2
    EPwm2Regs.TBCTL.bit.CTRMODE = 2; // up - down mode

    EPwm2Regs.AQCTLA.all = 0x0060; // set ePWM1A on CMPA up, clear ePWM1A on CMPA down
    EPwm2Regs.AQCTLB.all = 0x0600; // set ePWM1B on CMPB up, clear ePWM1B on CMPB down

//    EPwm2Regs.TBPRD = TPWM; // 1KHz - PWM signal //1500(100K),1250(120K),1666(90K),1154(130K),1364(110K)
//                 EPwm2Regs.CMPA.half.CMPA = TPWM/2; // 50% duty cycle first
//                 EPwm2Regs.CMPB = TPWM/2;
//                 EPwm1Regs.TBCTL.bit.SYNCOSEL = 1;   // generate a syncout if CTR = 0
//                 EPwm2Regs.TBCTL.bit.PHSEN = 1;      // enable phase shift for ePWM2
//                 EPwm2Regs.TBCTL.bit.SYNCOSEL = 0;   // syncin = syncout
//                 EPwm2Regs.TBPHS.half.TBPHS = TPWM; // 1/3 phase shift

    EPwm2Regs.DBRED = 55; // 10 microseconds delay
    EPwm2Regs.DBFED = 55; // for rising and falling edge
    EPwm2Regs.DBCTL.bit.OUT_MODE = 3; // ePWM1A = RED
    EPwm2Regs.DBCTL.bit.POLSEL = 2; // S3=1 inverted signal at ePWM1B
    EPwm2Regs.DBCTL.bit.IN_MODE = 0; // ePWM1A = source for RED & FED

}


//===========================================================================
// End of SourceCode.
//===========================================================================