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TMS320F280039C: how to implement delayed trip & release signal

Hang Yang
Expert 3356 points

Part Number: TMS320F280039C

Tool/software:

Hi experts,

My customer is developing I-type three-level inverter. When tripping the inverter, they would need to trip the outer switch first, then trip the inner switch after a short delay. 

They are now using the valley switching module to implement this, where the trip signal of outer switch is delayed in the valley switching module to generate the trip signal for the inner swtich.

However, they also need this delay when releasing the trip. The trip signal of inner switch should be released first, then the outer switch. Since the trip signal of the two switch is latched, they would be released at the same time upon a latch clear signal, either CBC or ONESHOT, and there would be no delay between the two trip release.

How to implement a delayed trip release signal?

They've run out of CLB resources already, it's better using the PWM modules to implement this function.

Regards,

Hang.

  • 0
    TI__Mastermind 28580 points

    Hi Hang,

    I'm not aware of any way to delay the release of a trip signal, but you may be able to replicate this behavior with an action qualifier software force and the deadband module. Is the customer already using the deadband module in their EPWM configuration?

    Thank you,

    Luke

  • 0 in reply to Luke Jones
    TI__Expert 3356 points

    Hi Luke,

    They are using the DB, but could you tell us how to do it with AQ + DB anyway? We can see if we can put this in DB.

    Regards,

    Hang.

  • 0 in reply to Hang Yang
    TI__Mastermind 28580 points

    Hi Hang,

    What I am suggesting is using the action qualifier software force to recreate your trip behavior and use the dead band module's rising edge and falling edge delay features to recreate the delay of the triggering and releasing of the trip, but I don't think this will be feasible if you are already using the dead band module for other purposes.

    Are there any spare resources in any of the CLB's? You may be able to create a trip signal from the CLB and feed this to the PWMs.

    Thank you,

    Luke