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Tool/software:
Hello all,
I have been searching for some clear direction on how to boot CPU2/CM from an image stored in CPU1's Flash region.
In my system, we download a binary containing all three firmware images (CPU1/CPU2/CM) via Ethernet. This image will be parsed and sent to CPU1 via shared memory. CPU1 will be responsible for storing the image into CPU1 Flash.
On CPU1 boot, CPU1 will grab images for the other cores from the Flash region and place them into shared RAM and tells CPU2/CM to vector to that area and start executing (obviously, there are different images in this area for CPU2/CM).
My initial thought was that the IPC Boot message could be used to do this, but it is only 2k. Could I provide an entry address in the IPC Boot Message for the processor? How would I do this?
The process would be:
- CPU1 boots
- CPU1 places CPU2 code from CPU1 flash into CPU1-CPU2 shared memory
- CPU1 places CM code from CPU1 flash into CPU1-CM shared memory
- CPU1 issues IPC Boot Message to CPU2 with entry address in shared memory
- CPU1 issues IPC Boot Message to CM with entry address in shared memory
- CPU1 continues booting; CPU2 and CM start booting from shared memory
Is there a better way to accomplish this? We want to be able to update firmware by writing a new combined binary.
Our first approach was to have each core receive their particular image and write it to its own flash region, and then boot from flash for all cores. This path seems to have a lot data transfer and complication. Keeping the images in one location and coordinating booting seems simpler.
Any forum input/ideas/thoughts? Thanks!!
