TMS320F280039C: CLA program does not fit into RAM

Tool/software:

Hi,

I'm using the CLA to read out two SPI encoders and so far that works fine. Not that I had to include some calibration routines, the code grew more and more and I'm now in the situation to use 4 RAM LS banks in total (3 for the program, 1 for the data), but this seems not to work out, I always get the following compiler error: 

 "program will not fit into available memory, or the section contains a call site that requires a trampoline that can't be generated for this section. load placement with alignment/blocking fails for section "Cla1Prog" size 0x10dc page 0.  Available memory ranges"

Now I don't understand the issue, since I could successfully merge RAMLS1 and RAMLS2 to a bigger bank, but it seems I cannot merge LS1-LS3 to a bank without this issue.

f28003x_flash_lib_is:

...

    RAMLS012               	  : origin = 0x008000, length = 0x001800
    RAMLS3               	  : origin = 0x009800, length = 0x000800

    RAMLSnP                   : origin = 0x00A000, length = 0x002000
    RAMGSnP                   : origin = 0x00C000, length = 0x001000
    RAMGSC                    : origin = 0x00D000, length = 0x001000
    RAMGSF                    : origin = 0x00E000, length = 0x001000
    RAMGSD                    : origin = 0x00F000, length = 0x000FF8
    
...

    // CLA Sections

#if defined(__TI_EABI__)
    /* CLA specific sections */
    Cla1Prog        : LOAD = FLASHBANK1_CLA,
                      RUN = RAMLS012,
                      LOAD_START(Cla1ProgLoadStart),
                      RUN_START(Cla1ProgRunStart),
                      LOAD_SIZE(Cla1ProgLoadSize),
                      ALIGN(8)

    .const_cla      : LOAD = FLASHBANK1_CLA,
                      RUN = RAMLS3,
                      RUN_START(Cla1ConstRunStart),
                      LOAD_START(Cla1ConstLoadStart),
                      LOAD_SIZE(Cla1ConstLoadSize),
                      ALIGN(8)
#else
    /* CLA specific sections */
    Cla1Prog        : LOAD = FLASHBANK1_CLA,
                      RUN = RAMLS012,
                      LOAD_START(_Cla1ProgLoadStart),
                      RUN_START(_Cla1ProgRunStart),
                      LOAD_SIZE(_Cla1ProgLoadSize),
                      ALIGN(8)

    .const_cla      : LOAD = FLASHBANK1_CLA,
                      RUN = RAMLS3,
                      RUN_START(_Cla1ConstRunStart),
                      LOAD_START(_Cla1ConstLoadStart),
                      LOAD_SIZE(_Cla1ConstLoadSize),
                      ALIGN(8)
#endif

    .scratchpad      : > RAMLS3
    .bss_cla         : > RAMLS3
    Cla1DataRam      : > RAMLS3 //RAMLS3
    cla_shared       : > RAMLS3
    CLADataLS1       : > RAMLS3

    Cla1ToCpuMsgRAM  : > CLATOCPU_MSGRAM
    CpuToCla1MsgRAM  : > CPUTOCLA_MSGRAM

Init for the CLA:

void MEMCFG_init()
{
    //
    // Initialize RAMs
    //
    MemCfg_initSections(MEMCFG_SECT_MSGCPUTOCLA1);
    MemCfg_initSections(MEMCFG_SECT_MSGCLA1TOCPU);
    while(!MemCfg_getInitStatus(MEMCFG_SECT_MSGCPUTOCLA1));
    while(!MemCfg_getInitStatus(MEMCFG_SECT_MSGCLA1TOCPU));
    //
    // Configure LSRAMs
    //
    MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS0, MEMCFG_LSRAMCONTROLLER_CPU_CLA1); //LS0 - LS2 needs to be for CLA --> Change in flash.cmd file
    MemCfg_setCLAMemType(MEMCFG_SECT_LS0, MEMCFG_CLA_MEM_PROGRAM);
    MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS1, MEMCFG_LSRAMCONTROLLER_CPU_CLA1);
    MemCfg_setCLAMemType(MEMCFG_SECT_LS1, MEMCFG_CLA_MEM_PROGRAM);
    MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS2, MEMCFG_LSRAMCONTROLLER_CPU_CLA1);
    MemCfg_setCLAMemType(MEMCFG_SECT_LS2, MEMCFG_CLA_MEM_PROGRAM);
    MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS3, MEMCFG_LSRAMCONTROLLER_CPU_CLA1);
    MemCfg_setCLAMemType(MEMCFG_SECT_LS3, MEMCFG_CLA_MEM_DATA);

    MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS4, MEMCFG_LSRAMCONTROLLER_CPU_ONLY);
    MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS5, MEMCFG_LSRAMCONTROLLER_CPU_ONLY);
    MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS6, MEMCFG_LSRAMCONTROLLER_CPU_ONLY);
    MemCfg_setLSRAMControllerSel(MEMCFG_SECT_LS7, MEMCFG_LSRAMCONTROLLER_CPU_ONLY);

    // Lock/Commit Registers
    //
    //
    // Enable Access Violation Interrupt
    //
    //
    // Correctable error Interrupt
    //
    MemCfg_setCorrErrorThreshold(0);
    MemCfg_disableCorrErrorInterrupt(MEMCFG_CERR_CPUREAD);
}

Any Idea why this does not work? I also activated the compiler option "--gen_func_subsections = on", but without success.

Edit: I found a work around, but I'm not sure what the tradeoff is. When I'm using the following it works:

Works out:

	Cla1Prog      	 : >> RAMLS012
	.const_cla		 : > RAMLS3

Does not work:

    // CLA specific sections
    Cla1Prog        : LOAD = FLASHBANK1_CLA,
                      RUN = RAMLS012,
                      LOAD_START(_Cla1ProgLoadStart),
                      RUN_START(_Cla1ProgRunStart),
                      LOAD_SIZE(_Cla1ProgLoadSize),
                      ALIGN(8)

    .const_cla      : LOAD = FLASHBANK1_CLA,
                      RUN = RAMLS3,
                      RUN_START(_Cla1ConstRunStart),
                      LOAD_START(_Cla1ConstLoadStart),
                      LOAD_SIZE(_Cla1ConstLoadSize),
                      ALIGN(8)

So, what is the trade off when not using the lfash bank loader? Will this lead to problems somehow?