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C28x Digital Power Library

sugita
Intellectual 270 points

Other Parts Discussed in Thread: CONTROLSUITE

Hello,

 

I read DPLib.pdf (C:\TI\controlSUITE\libs\app_libs\digital_power\f2803x_v3.2\Doc\DPLib.pdf).

In page 28, "5.2. Peripheral Configuration" says that "These two slaved PWM module time-bases are synced at every half period of the master and are also directly synced by the comparator1 output.".

And I see PWM_PSFB_PCMC_Cnf.c (C:\TI\controlSUITE\libs\app_libs\digital_power\f2803x_v3.2\C\PWM_PSFB_PCMC_Cnf.c).

I found something wrong in  PWM_PSFB_PCMC_Cnf.c as below.

 

71;(*ePWM[n]).TBCTL.bit.PHSEN = TB_DISABLE;

72;(*ePWM[n]).TBCTL.bit.SYNCOSEL = TB_CTR_CMPB; 

101;(*ePWM[n+1]).TBCTL.bit.PHSEN = TB_ENABLE;

102;(*ePWM[n+1]).TBCTL.bit.SYNCOSEL = TB_SYNC_IN; 

132;(*ePWM[n+1]).DCTRIPSEL.bit.DCAHCOMPSEL = DC_COMP1OUT; 

167;(*ePWM[n+2]).TBCTL.bit.PHSEN = TB_ENABLE;

172;(*ePWM[n+2]).TBCTL.bit.SYNCOSEL = TB_SYNC_IN;

184;(*ePWM[n+3]).TBCTL.bit.PHSEN = TB_ENABLE;

208;(*ePWM[n+3]).DCTRIPSEL.bit.DCAHCOMPSEL = DC_COMP1OUT; 

 

I think ePWM[n+1], ePWM[n+2] and ePWM[n+3] are synced by same trigger.

But ePWM[n+2] is not slaved PWM module.

ePWM[n+2].TBCTL.bit.PHSEN should be disable and needs TB_CTR_CMPB from ePWM[n].

Am I correct? Can someone explain please?

 

Best regards,

 

Nathan

  • 0
    Intellectual 270 points

    Hello,

     

    I'll ask again simply.  

    Page 24 of spruge9e.pdf says about CTR = Zero , " this signal is generated whenever the counter value is zero.". 

    Is this include when value of TBPHS is loaded into TBCTR ?

     

    Can somebody tell me, please ?

     

    Best regards,

     

    Natha

  • 0 in reply to sugita
    TI__Genius 10820 points

    Hi Nathan,

    ePWM[n+2].TBCTL.bit.PHSEN should be enabled to allow ePWM[n+2] time base to be synced by the master (ePWM[n]). Enabling this bit only ensures that on a SYNCin signal event and/or a COMPOUT event (when enabled - as is the case here) the time base counter will be loaded with the value in TBPHS. The SYNCin event coming into this module (n+2) is generated by ePWM[n] time base as defined by the SYNCOSEL bit of module n. Modules down the chain pass the input SYNCin signal through to the ones further down the chain. This is defined by configuring SYNCOSEL= SYNCin for modules (n+1) and (n+2).

    I hope this clarifies the usage. Let me know if you have any more questions.

    Hrishi

  • 0 in reply to Hrishi Nene
    Intellectual 270 points

     

    Hi Hrishi,

     

    Thank you for your answer. I read your explanation. 

    In page 24, spruge9e.pdf mentions that EPWMxSYNCO is from one of EPWMxSYNCI, CTR = Zero and CTR = CMPB. 

    And there is a OR symbol in Figure 5. The input are TBCTL[SWFSYNC], EPWMxSYNC, DCAEVT1.sync and DCBEVT1.sync. 

    The output connects to "Sync Out Select" (to EPWMxSYNCO ). Those informations confuse me. 

    Anyway, If below is correct, I can understand. 

    1.TBCTL[SWFSYNC], DCAEVT1.sync and DCBEVT1.sync can not become EPWMxSYNCO. 

    2.EPWMxSYNCI, CTR = Zero and CTR = CMPB can become EPWMxSYNCO. 

    I hope above is correct. 

     

    Best regards, 

     

    Nathan 

     

  • 0 in reply to sugita
    Intellectual 270 points

    Hello Hrishi,

     

    I'm not sure if my question confuse you. 

    I want to confirm about below. Could you tell me correct or not about 1,2.

     

    1.TBCTL[SWFSYNC], DCAEVT1.sync and DCBEVT1.sync can not become EPWMxSYNCO. 

    2.EPWMxSYNCI, CTR = Zero and CTR = CMPB can become EPWMxSYNCO.

     

    I hope you remember another question ( "About "CTR = zero pulse" of Piccolo ePWM" ).

     

    Best regards,

     

    Nathan

  • 0 in reply to sugita
    TI__Genius 10820 points

    Nathan,

    You are correct about DCAEVT1.sync and DCBEVT1.sync. They cannot become EPWMxSYNCO. I believe SWFSYNC can become EPWMxSYNCO just like EPWMxSYNCI, CTR = Zero and CTR = CMPB.

    I hope this helps.

    Hrishi

  • 0 in reply to Hrishi Nene
    Intellectual 270 points

    Hi Hrishi,

     

    Thank you very much for your support and also another question. 

     

    Best regards,

     

    Nathan

  • 0 in reply to sugita
    Prodigy 20 points

    hi hrishi,

    i m voind i m new to this piccolo i m working on synci and synco so in

    one piccolo i given so tho will act as master

        // Setup TBCLK

        EPwm1Regs.TBPRD = EPWM1_TIMER_TBPRD;          // Set timer period 801 TBCLKs

        EPwm1Regs.TBPHS.half.TBPHS = 0x0000;          // Phase is 0

        EPwm1Regs.TBCTR = 0x0000;                     // Clear counter

         // Set Compare values

        EPwm1Regs.CMPA.half.CMPA = EPWM1_CMPA;    // Set compare A value

        EPwm1Regs.CMPB = EPWM1_CMPB;

        // Setup counter mode

        EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up

     //   EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;       // Disable phase loading

        EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;      // Clock ratio to SYSCLKOUT/4

        EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;

       //////////////////////////////////////////////////////////////////////////////////////////

        EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Master module

        EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW;

        EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // Sync down-stream module

    ///////////////////////////////////////////////////////////////////////////////

         // Setup shadowing

        EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;

        EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;

        EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // Load on Zero

        EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

         // Set actions

        EPwm1Regs.AQCTLA.bit.CAU =AQ_SET;            // Set PWM1A on event A, up

        EPwm1Regs.AQCTLA.bit.CAD =AQ_CLEAR;          // Clear PWM1A on event A,

        EPwm1Regs.AQCTLB.bit.CBU =AQ_CLEAR;            // Set PWM1A on event A, up

         EPwm1Regs.AQCTLB.bit.CBD =AQ_SET;          // Clear PWM1A on even     // Interrupt where we will change the Compare Values

        EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;     // Select INT on Zero event

        EPwm1Regs.ETSEL.bit.INTEN = 1;                // Enable INT

        EPwm1Regs.ETPS.bit.INTPRD = ET_1ST;           // Generate INT on 1st event

        // Information this example uses to keep track

        // of the direction the CMPA/CMPB values are

        // moving, the min and max allowed values and

        // a pointer to the correct ePWM registers

        epwm1_info.EPwm_CMPA_Direction = EPWM_CMP_UP;  // Start by increasing CMPA &

        epwm1_info.EPwm_CMPB_Direction = EPWM_CMP_UP;  // Start by increasing CMPA &

         epwm1_info.EPwmTimerIntCount = 1;              // Zero the interrupt counter

        epwm1_info.EPwm1RegHandle = &EPwm1Regs;         // Set the pointer to the

        epwm1_info.EPwmCMPA = EPWM1_CMPA;       // Setup  CMPA

        epwm1_info.EPwmCMPB = EPWM1_CMPB;       // Setup  CMPA

    and in other piccolo i given so this will act as slave  

        EPwm1Regs.TBPRD = EPWM1_TIMER_TBPRD;          // Set timer period 801 TBCLKs

        EPwm1Regs.TBPHS.half.TBPHS = 0x0000;          // Phase is 0

        EPwm1Regs.TBCTR = 0x0000;                     // Clear counter

     

        // Set Compare values

        EPwm1Regs.CMPA.half.CMPA = EPWM1_CMPA;    // Set compare A value

        EPwm1Regs.CMPB = EPWM1_CMPB;

        // Setup counter mode

        EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up

     //   EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;       // Disable phase loading

        EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;      // Clock ratio to SYSCLKOUT/4

        EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;

     //////////////////////////////////////////////////////////////////////////////////////////

        EPwm1Regs.TBCTL.bit.PHSEN = TB_ENABLE; // Slave module

        EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW;

        EPwm1Regs.TBCTL.bit.SYNCOSEL = 1;           // TB_SYNC_IN; // sync flow-through

        EPwm1Regs.TBCTL.bit.SWFSYNC=1;

    ///////////////////////////////////////////////////////////////////////////////

         // Setup shadowing

        EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;

        EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;

        EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // Load on Zero

        EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

         // Set actions

        EPwm1Regs.AQCTLA.bit.CAU =AQ_SET;            // Set PWM1A on event A, up

                                                      // count

        EPwm1Regs.AQCTLA.bit.CAD =AQ_CLEAR;          // Clear PWM1A on event A,

                                                      // down count

        EPwm1Regs.AQCTLB.bit.CBU =AQ_CLEAR;            // Set PWM1A on event A, up

                                                        // count

        EPwm1Regs.AQCTLB.bit.CBD =AQ_SET;          // Clear PWM1A on event A,

                                                        // down count

         // Interrupt where we will change the Compare Values

        EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;     // Select INT on Zero event

        EPwm1Regs.ETSEL.bit.INTEN = 1;                // Enable INT

        EPwm1Regs.ETPS.bit.INTPRD = ET_1ST;           // Generate INT on 1st event

         // Information this example uses to keep track

        // of the direction the CMPA/CMPB values are

        // moving, the min and max allowed values and

        // a pointer to the correct ePWM registers

        epwm1_info.EPwm_CMPA_Direction = EPWM_CMP_UP;  // Start by increasing CMPA &

        epwm1_info.EPwm_CMPB_Direction = EPWM_CMP_UP;  // Start by increasing CMPA &

     

        epwm1_info.EPwmTimerIntCount = 1;              // Zero the interrupt counter

        epwm1_info.EPwm1RegHandle = &EPwm1Regs;         // Set the pointer to the

                                                       // ePWM module

        epwm1_info.EPwmCMPA = EPWM1_CMPA;       // Setup  CMPA

        epwm1_info.EPwmCMPB = EPWM1_CMPB;       // Setup  CMPA

    but i m unable to do sync between piccolo epwms pulses

  • 0 in reply to Vinod Singh
    TI__Genius 10820 points

    Hi Vinod,

    In your PWM configuration code for the slave, I noticed that you have not enabled the phase loading for PWM1. ( EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; ). This should be enabled for PWM1 of slave to be synchronized with PWM1 of the master. Also, you must select the EPWMSYNCO peripheral function in the GPIO peripheral mux configuration for the master (GPIO 6 or GPIO33).

    I hope this helps.

    Hrishi

  • 0 in reply to Hrishi Nene
    Intellectual 705 points

    thanks for harishi,

    in one piccolo (master) i kept that  EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE and in another piccolo(slave) i kept  EPwm1Regs.TBCTL.bit.PHSEN = TB_ENABLE; u can see in above code also i m using epmwsynco1(master piccolo1) to  epwmsynci1(slave in another piccolo) only i m not doing ewpmsynci2 

  • 0 in reply to pradeep kumar ama
    Intellectual 705 points

    hi, this is vinod

    i check the out put gpio32 is low and gpio33 is high continuously 

  • 0 in reply to pradeep kumar ama
    TI__Genius 10820 points

    Vinod,

    Please make sure that the SYNCO function is selected for the appropriate GPIO (one that you are using for master to slave syncing) using the peripheral mux register for the master device. You can find the peripheral mux register information in section 4.5 of the system control and  interrupts guide (SPRUGL8B).

    Hrishi

  • 0 in reply to Hrishi Nene
    Intellectual 705 points

    thanks for reply,

    1) if i check both wave forms in cro it not showing correct pulses and i want to know where it shows any phase difference in output wave form in master to slave but i am giving zero phase for both epwms....  

    2) one more problem in cro when i am checking wave forms these are running on cro with different speed and i unable to synchronous the difference between this signals. master epwm is moving more speed then slave in cro...  

    3) if i check output in gpio33 it will give 0 and gpio 32 will give 1 and  before discussion  u said that sync gpio need to toggle right which gpio need to toggle either 33 or 32  

    my code for is 

    EALLOW;

    GpioCtrlRegs.GPBPUD.bit.GPIO32 = 0; // Enable pull-up on GPIO32 (EPWMSYNCI)

    GpioCtrlRegs.GPBQSEL1.bit.GPIO32 = 0; // Synch to SYSCLKOUT GPIO32 (EPWMSYNCI)

    GpioCtrlRegs.GPBMUX1.bit.GPIO32 = 2; // Configures GPIO32 for EPWMSYNCI operation.

    GpioCtrlRegs.GPBPUD.bit.GPIO33 = 1; // Disable pull-up on GPIO33 (EPWMSYNCO)

    GpioCtrlRegs.GPBMUX1.bit.GPIO33 = 2; // Configures GPIO33 for EPWMSYNCO

    EDIS;

    thanks and regards,

    vinod,

  • 0 in reply to pradeep kumar ama
    Intellectual 705 points

    hi,

    hirshi

    i m waiting for urs reply.....

    vinod

  • 0 in reply to pradeep kumar ama
    Intellectual 705 points

    hi i m vinod pl any one solve my problem on synci and synco in piccolo pl.......

  • 0 in reply to pradeep kumar ama
    TI__Genius 10820 points

    Hi Vinod,

    Please see my comments below.

    1) if i check both wave forms in cro it not showing correct pulses and i want to know where it shows any phase difference in output wave form in master to slave but i am giving zero phase for both epwms....

    HN:  There may be some delay introduced by the signal path that might be contributing to extra phase shift. Try to make the connection/trace between SYNCO (Master) and SYNCI (Slave) to be as short as possible. If the amount of added delay or phase offset is constant, you can easily compensate for it by using an adjusted value in the TBPHS register (Slave PWM). 

    2) one more problem in cro when i am checking wave forms these are running on cro with different speed and i unable to synchronous the difference between this signals. master epwm is moving more speed then slave in cro...  

    HN:  Are you saying that the observed PWM frequencies are different? How much is the difference in the PWM frequencies measured on the oscilloscope?  Have you programmed the same period (TBPRD) values for both master and slave PWMs? It might be better to send a few oscilloscope waveform captures.

    3) if i check output in gpio33 it will give 0 and gpio 32 will give 1 and  before discussion  u said that sync gpio need to toggle right which gpio need to toggle either 33 or 32  

    HN: From your configuration it looks like you are using GPIO33 as the SYNCO pin. Make sure that you have configured the PWM registers correctly such that a SYNC pulse is set to be produced at a known point within a PWM cycle.

    At this point it might help to look through your PWM configuration and some waveform captures.

    Hrishi

     

     

  • 0 in reply to Hrishi Nene
    Intellectual 705 points

    hi Hrishi thanks for reply,

    i m attaching my code pl see it once. i m locking master pulses with slave pulse but i m unable do phase shift

     

  • 0 in reply to pradeep kumar ama
    TI__Genius 10820 points

    I don't see the attachment. Can you please try uploading it again? Also, can you please answer my questions in my previous post? Waveforms and scope captures always make it easier to understand and to get to the root cause of a problem. I will really appreciate it if you can provide some of these.

    Thanks.

    HN:  Are you saying that the observed PWM frequencies are different? How much is the difference in the PWM frequencies measured on the oscilloscope?  Have you programmed the same period (TBPRD) values for both master and slave PWMs? It might be better to send a few oscilloscope waveform captures.

    At this point it might help to look through your PWM configuration and some waveform captures.

    Hrishi

     

  • 0 in reply to Hrishi Nene
    Intellectual 705 points

    8816.master.docx

    i attaching my code pl inform me any changes.....

  • 0 in reply to pradeep kumar ama
    Intellectual 705 points

    hi, 

    i found problem in my code i m using interrupt_irs  for my epwm so when interrupt isr will generate depending on that in which interrupt count i need pulse there i  will be give values in cpma so  if i m doing in this way i m unable to do synchronization so pl is there any method that i can doing synchronization but in my code interrupt_isr is must for epwms.