TMS320F28379D: SOC0 and SOC1 issue on ADC-A

electrocc

Part Number: TMS320F28379D
Other Parts Discussed in Thread: C2000WARE

Tool/software:

Hello,

I'd like to explain the issue I'm facing.

In the initial version of the program (shown below), everything works fine. I’m using 4 ADCs: first, I wait for their synchronization, then I perform several conversions using only SOC0. Note that some ADC initializations are handled in a separate function.

EALLOW;
AdcaRegs.ADCSOC0CTL.bit.CHSEL = 2;      // SOC0 will convert pin A2 on ADC-A
AdcbRegs.ADCSOC0CTL.bit.CHSEL = 2;      // SOC0 will convert pin B2 on ADC-B
AdccRegs.ADCSOC0CTL.bit.CHSEL = 2;      // SOC0 will convert pin C2 on ADC-C
AdcdRegs.ADCSOC0CTL.bit.CHSEL = 0;      // SOC0 will convert pin D0 on ADC-D

AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 0;  // End of SOC0 will set INT1 flag on ADC-A
AdcbRegs.ADCINTSEL1N2.bit.INT1SEL = 0;  // End of SOC0 will set INT1 flag on ADC-B
AdccRegs.ADCINTSEL1N2.bit.INT1SEL = 0;  // End of SOC0 will set INT1 flag on ADC-C
AdcdRegs.ADCINTSEL1N2.bit.INT1SEL = 0;  // End of SOC0 will set INT1 flag on ADC-D

AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1;    // ADCINT1 is enabled on ADC-A
AdcbRegs.ADCINTSEL1N2.bit.INT1E = 1;    // ADCINT1 is enabled on ADC-B
AdccRegs.ADCINTSEL1N2.bit.INT1E = 1;    // ADCINT1 is enabled on ADC-C
AdcdRegs.ADCINTSEL1N2.bit.INT1E = 1;    // ADCINT1 is enabled on ADC-D

AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;          // Acknowledge flag on ADC-A
AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;          // Acknowledge flag on ADC-B
AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;          // Acknowledge flag on ADC-C
AdcdRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;          // Acknowledge flag on ADC-D

AdcaRegs.ADCSOC0CTL.bit.ACQPS = 231;        // SOC0 will use sample duration of 231 SYSCLK cycles on ADC-A
AdcbRegs.ADCSOC0CTL.bit.ACQPS = 231;        // SOC0 will use sample duration of 231 SYSCLK cycles on ADC-B
AdccRegs.ADCSOC0CTL.bit.ACQPS = 231;        // SOC0 will use sample duration of 231 SYSCLK cycles on ADC-C
AdcdRegs.ADCSOC0CTL.bit.ACQPS = 231;        // SOC0 will use sample duration of 231 SYSCLK cycles on ADC-D

EDIS;

CoefTableExc = SINE_TAB_SIZE_MAX / sine_tab_size;

AdcaRegs.ADCSOCFRC1.all = 0x0001;       // SOC0 is used on ADC-A - Start of conversion
AdcbRegs.ADCSOCFRC1.all = 0x0001;       // SOC0 is used on ADC-B - Start of conversion
AdccRegs.ADCSOCFRC1.all = 0x0001;       // SOC0 is used on ADC-C - Start of conversion
AdcdRegs.ADCSOCFRC1.all = 0x0001;       // SOC0 is used on ADC-D - Start of conversion

//wait for ADC-A to complete, then acknowledge flag
//
while(AdcaRegs.ADCINTFLG.bit.ADCINT1 == 0);             // Synchro on ADC-A int
while(AdcbRegs.ADCINTFLG.bit.ADCINT1 == 0);             // Synchro on ADC-B int
while(AdccRegs.ADCINTFLG.bit.ADCINT1 == 0);             // Synchro on ADC-C int
while(AdcdRegs.ADCINTFLG.bit.ADCINT1 == 0);             // Synchro on ADC-D int

*********************************************************************************

Index = 0;

for (SineIndex = 0; SineIndex < (SINE_NB + FreeSineNb); SineIndex ++)
{
    for (SineTableIndex = 0; SineTableIndex < sine_tab_size ; SineTableIndex ++)
    {

        while(AdcaRegs.ADCINTFLG.bit.ADCINT1 == 0);     // Wait for ADC-A to complete
        while(AdcbRegs.ADCINTFLG.bit.ADCINT1 == 0);     // Wait for ADC-B to complete
        while(AdccRegs.ADCINTFLG.bit.ADCINT1 == 0);     // Wait for ADC-C to complete
        while(AdcdRegs.ADCINTFLG.bit.ADCINT1 == 0);     // Wait for ADC-D to complete

        AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;          // Acknowledge flag on ADC-A
        AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;          // Acknowledge flag on ADC-B
        AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;          // Acknowledge flag on ADC-C
        AdcdRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;          // Acknowledge flag on ADC-D

        if( SineIndex >= FreeSineNb )
        {
            IndexRecord = (int)(Index / (sine_tab_size / SINE_TAB_SIZE));

            BBuffer_S1[IndexRecord] = AdcaResultRegs.ADCRESULT0;

            switch (FeedBackAcq)
            {
                case 0:
                    Buffer_S2[IndexRecord]  = AdcbResultRegs.ADCRESULT0;
                    break;

                case 1:
                    Buffer_S3[IndexRecord] = AdccResultRegs.ADCRESULT0;
                    break;

                case 2:
                    Buffer_S4[IndexRecord] = AdcdResultRegs.ADCRESULT0;
                    break;
            }

            Index++;
        }
    }
}

Next, I want to utilize both SOC0 and SOC1 on ADC-A. However, in the first version of the program, execution halts at the following line:

EALLOW;
AdcaRegs.ADCSOC0CTL.bit.CHSEL = 2;      // SOC0 will convert pin A2 on ADC-A
AdcaRegs.ADCSOC1CTL.bit.CHSEL = 3;      // SOC1 will convert pin A3 on ADC-A 
AdcbRegs.ADCSOC0CTL.bit.CHSEL = 2;      // SOC0 will convert pin B2 on ADC-B 
AdccRegs.ADCSOC0CTL.bit.CHSEL = 2;      // SOC0 will convert pin C2 on ADC-C 
AdcdRegs.ADCSOC0CTL.bit.CHSEL = 0;      // SOC0 will convert pin D0 on ADC-D 

AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 1;  // End of SOC1 will set INT1 flag on ADC-A
AdcbRegs.ADCINTSEL1N2.bit.INT1SEL = 0;  // End of SOC0 will set INT1 flag on ADC-B
AdccRegs.ADCINTSEL1N2.bit.INT1SEL = 0;  // End of SOC0 will set INT1 flag on ADC-C
AdcdRegs.ADCINTSEL1N2.bit.INT1SEL = 0;  // End of SOC0 will set INT1 flag on ADC-D

AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1;    // ADCINT1 is enabled on ADC-A
AdcbRegs.ADCINTSEL1N2.bit.INT1E = 1;    // ADCINT1 is enabled on ADC-B
AdccRegs.ADCINTSEL1N2.bit.INT1E = 1;    // ADCINT1 is enabled on ADC-C
AdcdRegs.ADCINTSEL1N2.bit.INT1E = 1;    // ADCINT1 is enabled on ADC-D

AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;  // Acknowledge flag on ADC-A
AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;  // Acknowledge flag on ADC-B
AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;  // Acknowledge flag on ADC-C
AdcdRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;  // Acknowledge flag on ADC-D

AdcaRegs.ADCSOC0CTL.bit.ACQPS = 231;    // SOC0 will use sample duration of 231 SYSCLK cycles on ADC-A
AdcaRegs.ADCSOC1CTL.bit.ACQPS = 231;    // SOC1 will use sample duration of 231 SYSCLK cycles on ADC-A
AdcbRegs.ADCSOC0CTL.bit.ACQPS = 231;    // SOC0 will use sample duration of 231 SYSCLK cycles on ADC-B
AdccRegs.ADCSOC0CTL.bit.ACQPS = 231;    // SOC0 will use sample duration of 231 SYSCLK cycles on ADC-C
AdcdRegs.ADCSOC0CTL.bit.ACQPS = 231;    // SOC0 will use sample duration of 231 SYSCLK cycles on ADC-D

EDIS;

CoefTableExc = SINE_TAB_SIZE_MAX / sine_tab_size;

AdcaRegs.ADCSOCFRC1.all = 0x0003;       // SOC0 and SOC1 are used on ADC-A - Start of conversion
AdcbRegs.ADCSOCFRC1.all = 0x0001;       // SOC0 is used on ADC-B - Start of conversion
AdccRegs.ADCSOCFRC1.all = 0x0001;       // SOC0 is used on ADC-C - Start of conversion
AdcdRegs.ADCSOCFRC1.all = 0x0001;       // SOC0 is used on ADC-D - Start of conversion

//wait for ADC-A to complete, then acknowledge flag
//
while(AdcaRegs.ADCINTFLG.bit.ADCINT1 == 0);             // Synchro on ADC-A int
while(AdcbRegs.ADCINTFLG.bit.ADCINT1 == 0);             // Synchro on ADC-B int
while(AdccRegs.ADCINTFLG.bit.ADCINT1 == 0);             // Synchro on ADC-C int
while(AdcdRegs.ADCINTFLG.bit.ADCINT1 == 0);             // Synchro on ADC-D int

*********************************************************************************

Index = 0;

for (SineIndex = 0; SineIndex < (SINE_NB + FreeSineNb); SineIndex ++)
{
    for (SineTableIndex = 0; SineTableIndex < sine_tab_size ; SineTableIndex ++)
    {

        while(AdcaRegs.ADCINTFLG.bit.ADCINT1 == 0);     // Wait for ADC-A to complete
        while(AdcbRegs.ADCINTFLG.bit.ADCINT1 == 0);     // Wait for ADC-B to complete
        while(AdccRegs.ADCINTFLG.bit.ADCINT1 == 0);     // Wait for ADC-C to complete
        while(AdcdRegs.ADCINTFLG.bit.ADCINT1 == 0);     // Wait for ADC-D to complete

// Program stops above on the first conversion //

        AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;          // Acknowledge flag on ADC-A
        AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;          // Acknowledge flag on ADC-B
        AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;          // Acknowledge flag on ADC-C
        AdcdRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;          // Acknowledge flag on ADC-D

        if( SineIndex >= FreeSineNb )
        {
            IndexRecord = (int)(Index / (sine_tab_size / SINE_TAB_SIZE));

            Buffer_S1[IndexRecord] = AdcaResultRegs.ADCRESULT0;
            Buffer_S5[IndexRecord] = AdcaResultRegs.ADCRESULT1;

            switch (FeedBackAcq)
            {
                case 0:
                    Buffer_S2[IndexRecord]  = AdcbResultRegs.ADCRESULT0;
                    break;

                case 1:
                    Buffer_S3[IndexRecord] = AdccResultRegs.ADCRESULT0;
                    break;

                case 2:
                    Buffer_S4[IndexRecord] = AdcdResultRegs.ADCRESULT0;
                    break;
            }

            Index++;
        }
    }
}

In the second version of the program, if I remove the flag acknowledgment after conversion, the program doesn’t stop. However, I’m uncertain if this behavior is correct.

EALLOW;
AdcaRegs.ADCSOC0CTL.bit.CHSEL = 2;      // SOC0 will convert pin A2 on ADC-A
AdcaRegs.ADCSOC1CTL.bit.CHSEL = 3;      // SOC1 will convert pin A3 on ADC-A 
AdcbRegs.ADCSOC0CTL.bit.CHSEL = 2;      // SOC0 will convert pin B2 on ADC-B 
AdccRegs.ADCSOC0CTL.bit.CHSEL = 2;      // SOC0 will convert pin C2 on ADC-C 
AdcdRegs.ADCSOC0CTL.bit.CHSEL = 0;      // SOC0 will convert pin D0 on ADC-D 

AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 1;  // End of SOC1 will set INT1 flag on ADC-A
AdcbRegs.ADCINTSEL1N2.bit.INT1SEL = 0;  // End of SOC0 will set INT1 flag on ADC-B
AdccRegs.ADCINTSEL1N2.bit.INT1SEL = 0;  // End of SOC0 will set INT1 flag on ADC-C
AdcdRegs.ADCINTSEL1N2.bit.INT1SEL = 0;  // End of SOC0 will set INT1 flag on ADC-D

AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1;    // ADCINT1 is enabled on ADC-A
AdcbRegs.ADCINTSEL1N2.bit.INT1E = 1;    // ADCINT1 is enabled on ADC-B
AdccRegs.ADCINTSEL1N2.bit.INT1E = 1;    // ADCINT1 is enabled on ADC-C
AdcdRegs.ADCINTSEL1N2.bit.INT1E = 1;    // ADCINT1 is enabled on ADC-D

AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;  // Acknowledge flag on ADC-A
AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;  // Acknowledge flag on ADC-B
AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;  // Acknowledge flag on ADC-C
AdcdRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;  // Acknowledge flag on ADC-D

AdcaRegs.ADCSOC0CTL.bit.ACQPS = 231;    // SOC0 will use sample duration of 231 SYSCLK cycles on ADC-A
AdcaRegs.ADCSOC1CTL.bit.ACQPS = 231;    // SOC1 will use sample duration of 231 SYSCLK cycles on ADC-A
AdcbRegs.ADCSOC0CTL.bit.ACQPS = 231;    // SOC0 will use sample duration of 231 SYSCLK cycles on ADC-B
AdccRegs.ADCSOC0CTL.bit.ACQPS = 231;    // SOC0 will use sample duration of 231 SYSCLK cycles on ADC-C
AdcdRegs.ADCSOC0CTL.bit.ACQPS = 231;    // SOC0 will use sample duration of 231 SYSCLK cycles on ADC-D

EDIS;

CoefTableExc = SINE_TAB_SIZE_MAX / sine_tab_size;

AdcaRegs.ADCSOCFRC1.all = 0x0003;       // SOC0 and SOC1 are used on ADC-A - Start of conversion
AdcbRegs.ADCSOCFRC1.all = 0x0001;       // SOC0 is used on ADC-B - Start of conversion
AdccRegs.ADCSOCFRC1.all = 0x0001;       // SOC0 is used on ADC-C - Start of conversion
AdcdRegs.ADCSOCFRC1.all = 0x0001;       // SOC0 is used on ADC-D - Start of conversion

//wait for ADC-A to complete, then acknowledge flag
//
while(AdcaRegs.ADCINTFLG.bit.ADCINT1 == 0);             // Synchro on ADC-A int
while(AdcbRegs.ADCINTFLG.bit.ADCINT1 == 0);             // Synchro on ADC-B int
while(AdccRegs.ADCINTFLG.bit.ADCINT1 == 0);             // Synchro on ADC-C int
while(AdcdRegs.ADCINTFLG.bit.ADCINT1 == 0);             // Synchro on ADC-D int

*********************************************************************************

Index = 0;

for (SineIndex = 0; SineIndex < (SINE_NB + FreeSineNb); SineIndex ++)
{
    for (SineTableIndex = 0; SineTableIndex < sine_tab_size ; SineTableIndex ++)
    {

        while(AdcaRegs.ADCINTFLG.bit.ADCINT1 == 0);     // Wait for ADC-A to complete
        while(AdcbRegs.ADCINTFLG.bit.ADCINT1 == 0);     // Wait for ADC-B to complete
        while(AdccRegs.ADCINTFLG.bit.ADCINT1 == 0);     // Wait for ADC-C to complete
        while(AdcdRegs.ADCINTFLG.bit.ADCINT1 == 0);     // Wait for ADC-D to complete

// If I remove ADCs acknowledge, program doesn't stop above on the first conversion
/*      
        AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;          // Acknowledge flag on ADC-A
        AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;          // Acknowledge flag on ADC-B
        AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;          // Acknowledge flag on ADC-C
        AdcdRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;          // Acknowledge flag on ADC-D
*/
        if( SineIndex >= FreeSineNb )
        {
            IndexRecord = (int)(Index / (sine_tab_size / SINE_TAB_SIZE));

            Buffer_S1[IndexRecord] = AdcaResultRegs.ADCRESULT0;
            Buffer_S5[IndexRecord] = AdcaResultRegs.ADCRESULT1;

            switch (FeedBackAcq)
            {
                case 0:
                    Buffer_S2[IndexRecord]  = AdcbResultRegs.ADCRESULT0;
                    break;

                case 1:
                    Buffer_S3[IndexRecord] = AdccResultRegs.ADCRESULT0;
                    break;

                case 2:
                    Buffer_S4[IndexRecord] = AdcdResultRegs.ADCRESULT0;
                    break;
            }

            Index++;
        }
    }
}

Do you have any suggestions to help me understand? How can it work if I never acknowledge the flag?

In another part of my program, I use ADC conversion with two SOCs, but I don't encounter this issue there.

EALLOW;  // Use 2 SOCs for Port D
AdcaRegs.ADCSOC0CTL.bit.CHSEL = 4;          // SOC0 will convert pin A4 on ADC-A 
AdccRegs.ADCSOC0CTL.bit.CHSEL = 4;          // SOC0 will convert pin C2 on ADC-C
AdcdRegs.ADCSOC0CTL.bit.CHSEL = 2;          // SOC0 will convert pin D2 on ADC-D
AdcdRegs.ADCSOC1CTL.bit.CHSEL = 4;          // SOC1 will convert pin D4 on ADC-D

AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1;        // ADCINT1 is enabled
AdccRegs.ADCINTSEL1N2.bit.INT1E = 1;        // ADCINT1 is enabled
AdcdRegs.ADCINTSEL1N2.bit.INT1E = 1;        // ADCINT1 is enabled

AdcaRegs.ADCINTFLGCLR.all = 0x0001;         // Clears ADCINT1 flag bit on ADC-A
AdccRegs.ADCINTFLGCLR.all = 0x0001;         // Clears ADCINT1 flag bit on ADC-C
AdcdRegs.ADCINTFLGCLR.all = 0x0001;         // Clears ADCINT1 flag bit on ADC-D

AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 0;  // End of SOC0 will set INT1 flag on ADC-A
AdccRegs.ADCINTSEL1N2.bit.INT1SEL = 0;  // End of SOC0 will set INT1 flag on ADC-C
AdcdRegs.ADCINTSEL1N2.bit.INT1SEL = 1;  // End of SOC1 will set INT1 flag on ADC-D

EDIS;

AdcaRegs.ADCSOCFRC1.all = 0x0001;           // SOC0 is used on ADC-A             - Start of conversion
AdccRegs.ADCSOCFRC1.all = 0x0001;           // SOC0 is used on ADC-C             - Start of conversion
AdcdRegs.ADCSOCFRC1.all = 0x0003;           // SOC0 and SOC1 are used on ADC-D   - Start of conversion

//wait for ADCA to complete, then acknowledge flag
//
while(AdcaRegs.ADCINTFLG.bit.ADCINT1 == 0);
AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;

//wait for ADCC to complete, then acknowledge flag
//
while(AdccRegs.ADCINTFLG.bit.ADCINT1 == 0);
AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;

//wait for ADCD to complete, then acknowledge flag
//
while(AdcdRegs.ADCINTFLG.bit.ADCINT1 == 0);
AdcdRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;

//
//disable ADCINT1 flags on all ADCs to stop SamplingPeriod
//
EALLOW;
AdcaRegs.ADCINTSEL1N2.bit.INT1E = 0;
AdccRegs.ADCINTSEL1N2.bit.INT1E = 0;
AdcdRegs.ADCINTSEL1N2.bit.INT1E = 0;
EDIS;

// data processing ...

Thank you for your support.

over 2 years ago

0 Benjamin Collier over 2 years ago

TI__Mastermind 36526 points

Hi,

Writing the ADCSOCFRC1 bits will only force the conversion once. How did you want the ADC conversions to be triggered in the while loop?

Honestly, the most common approach for something like this would be to trigger the ADC conversions with EPWM signal, then do the ADC processing in an ADC ISR.

Alternatively, you could do continuous ADC conversions by triggering the ADC conversions with the ADC INT pulses. Then you can set the CONTINT bit so that you don't have to clear the interrupt bit.

We have examples for both of these in [C2000WARE]/driverlib/f2837xd/examples/

Best Regards,

Ben Collier

0 electrocc over 2 years ago in reply to Benjamin Collier

Expert 2450 points

Hi Benjamin,

Thanks for your answer.

There are several points of misunderstanding:

To me, clearing the ADCINT1 flag allowed a conversion to automatically restart.
If I understand correctly from what you are telling me, when TRIGSEL is set to 0, only setting the ADCSOCFRC1 register allows a conversion to restart "manually."

In that case, how does the first code above, which only uses SOC0, work, even though I'm not restarting a conversion using the ADCSOCFRC1 register?

In my ADC initialization section, I also set the ADCINTSOCSEL1 register so that ADCINT1 triggers SOC0.
Could this create a conflict since ADCINT1 is set to 1 at the end of the conversion?

AdcaRegs.ADCINTSOCSEL1.all = 0x01;          // ADCINT1 will trigger SOC0 on ADC-A
AdcbRegs.ADCINTSOCSEL1.all = 0x01;          // ADCINT1 will trigger SOC0 on ADC-B
AdccRegs.ADCINTSOCSEL1.all = 0x01;          // ADCINT1 will trigger SOC0 on ADC-C
AdcdRegs.ADCINTSOCSEL1.all = 0x01;          // ADCINT1 will trigger SOC0 on ADC-D

AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 0;      // End of SOC0 will set INT1 flag on ADC-A
AdcbRegs.ADCINTSEL1N2.bit.INT1SEL = 0;      // End of SOC0 will set INT1 flag on ADC-B
AdccRegs.ADCINTSEL1N2.bit.INT1SEL = 0;      // End of SOC0 will set INT1 flag on ADC-C
AdcdRegs.ADCINTSEL1N2.bit.INT1SEL = 0;      // End of SOC0 will set INT1 flag on ADC-D

Could the operating principle described below work:

Set the triggering of SOC0 and SOC1 with ADCINT2.

Configure EOC1 to set the ADCINT1 bit to 1 (end of conversions for SOC0 and SOC1)

    AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 1;      // End of SOC1 will set INT1 flag on ADC-A
    AdcbRegs.ADCINTSEL1N2.bit.INT1SEL = 0;      // End of SOC0 will set INT1 flag on ADC-B
    AdccRegs.ADCINTSEL1N2.bit.INT1SEL = 0;      // End of SOC0 will set INT1 flag on ADC-C
    AdcdRegs.ADCINTSEL1N2.bit.INT1SEL = 0;      // End of SOC0 will set INT1 flag on ADC-D
    
    AdcaRegs.ADCINTSOCSEL1.all = 0x0A;          // ADCINT2 will trigger SOC0 and SOC1 on ADC-A
    AdcbRegs.ADCINTSOCSEL1.all = 0x02;          // ADCINT2 will trigger SOC0 on ADC-B
    AdccRegs.ADCINTSOCSEL1.all = 0x02;          // ADCINT2 will trigger SOC0 on ADC-C
    AdcdRegs.ADCINTSOCSEL1.all = 0x02;          // ADCINT2 will trigger SOC0 on ADC-D
    
    AdcaRegs.ADCSOC0CTL.bit.TRIGSEL = 0;
    AdcaRegs.ADCSOC1CTL.bit.TRIGSEL = 0; 
    AdcbRegs.ADCSOC0CTL.bit.TRIGSEL = 0; 
    AdccRegs.ADCSOC0CTL.bit.TRIGSEL = 0; 
    AdcdRegs.ADCSOC0CTL.bit.TRIGSEL = 0; 
    
    AdcaRegs.ADCINTFLGCLR.bit.ADCINT2 = 1;          // Acknowledge flag on ADC-A
    AdcbRegs.ADCINTFLGCLR.bit.ADCINT2 = 1;          // Acknowledge flag on ADC-B
    AdccRegs.ADCINTFLGCLR.bit.ADCINT2 = 1;          // Acknowledge flag on ADC-C
    AdcdRegs.ADCINTFLGCLR.bit.ADCINT2 = 1;          // Acknowledge flag on ADC-D
    
    AdcaRegs.ADCSOCFRC1.all = 0x0003;       // SOC0 and SOC1 are used on ADC-A - Start of conversion
    AdcbRegs.ADCSOCFRC1.all = 0x0001;       // SOC0 is used on ADC-B - Start of conversion
    AdccRegs.ADCSOCFRC1.all = 0x0001;       // SOC0 is used on ADC-C - Start of conversion
    AdcdRegs.ADCSOCFRC1.all = 0x0001;       // SOC0 is used on ADC-D - Start of conversion
    
    //Loop : 
    
    while(AdcaRegs.ADCINTFLG.bit.ADCINT1 == 0);     // Wait for ADC-A to complete
    while(AdcbRegs.ADCINTFLG.bit.ADCINT1 == 0);     // Wait for ADC-B to complete
    while(AdccRegs.ADCINTFLG.bit.ADCINT1 == 0);     // Wait for ADC-C to complete
    while(AdcdRegs.ADCINTFLG.bit.ADCINT1 == 0);     // Wait for ADC-D to complete
    
    // results processing
    
    AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;          // Acknowledge flag on ADC-A
    AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;          // Acknowledge flag on ADC-B
    AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;          // Acknowledge flag on ADC-C
    AdcdRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;          // Acknowledge flag on ADC-D
    
    AdcaRegs.ADCINTFLGCLR.bit.ADCINT2 = 1;          // Acknowledge flag on ADC-A to restart a new conversion
    AdcbRegs.ADCINTFLGCLR.bit.ADCINT2 = 1;          // Acknowledge flag on ADC-B to restart a new conversion
    AdccRegs.ADCINTFLGCLR.bit.ADCINT2 = 1;          // Acknowledge flag on ADC-C to restart a new conversion
    AdcdRegs.ADCINTFLGCLR.bit.ADCINT2 = 1;          // Acknowledge flag on ADC-D to restart a new conversion

Thanks for your answer.

Regards,

0 Benjamin Collier over 2 years ago in reply to electrocc

TI__Mastermind 36526 points

Hi,

electrocc said:
In that case, how does the first code above, which only uses SOC0, work, even though I'm not restarting a conversion using the ADCSOCFRC1 register?

This is a good point, I cannot see from your code how the SOCs are being triggered again. How did you configure the SOCs to be triggered? With your code it cannot be only software triggered.

electrocc said:
In my ADC initialization section, I also set the ADCINTSOCSEL1 register so that ADCINT1 triggers SOC0.
Could this create a conflict since ADCINT1 is set to 1 at the end of the conversion?

Oh ok, this explains the above.

electrocc said:
Could the operating principle described below work:

Could you please check out the continuous example at [C2000WARE]/driverlib/f2837xd/examples/cpu1/adc/ ?

Your problem is likely caused by the timing of setting and clearing the ADCINT flag, and this example will show you how to handle that by setting up the ADC in continuous conversion mode.

Best Regards,

Ben Collier

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TMS320F28379D: SOC0 and SOC1 issue on ADC-A