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Original question:

TMS320F28P650DK: State of I/O During Boot-Up

TMS320F28P650DK: ADC Controlled Impedance

Mike Allette
Intellectual 355 points

Part Number: TMS320F28P650DK

Tool/software:

Hi,

Are controlled impedance traces required for the analog inputs to the ADC?

  • 0
    TI__Mastermind 40540 points

    Hi Mike,

    Sampling time on the ADC is a function of external impedance.  Ensuring minimal parasitic capacitance on the trace would have direct impact on sampling time duration.  If application requires differential mode sampling, ensure that the even and odd ADC channel pairs are of equal distance and impedance matched.

    Regards,

    Joseph

  • 0 in reply to Joseph Casuga
    Intellectual 355 points

    Hi Joseph,

    Thank you for your response. My application will be single ended. Would you be able to elaborate on what you said regarding the parasitic capacitance?

    For some of the inputs to the ADC, I'm monitoring voltage rails and incorporating resistor dividers to the ADC. Will the equivalent resistors need to be 50 Ohms going into the ADC? also would would the trace need to be impedance controlled as well at 50 Ohms?

  • +1 in reply to Mike Allette
    TI__Mastermind 40540 points

    Hi Mike,

    Trace parasitic cap typically is few pF (less than 10pF) which is fine.  If the total capacitance (parasitics + shunt) and source resistance increase at the input side, this will effectively be creating an external RC and form a charge-sharing circuit with the internal ADC input network and sampling time calculation becomes critical. See this application report for context.

    As long as source impedances (parasitics, source and trace resistance and filter caps) are kept to minimum, these should not have a huge impact on sampling/acquisition time.  The higher the external impedances, the more time it requires for the internal sampling cap to settle to a level for a more accurate conversion.

    Regards,

    Joseph