Tool/software:
Hi TI,
just a small question and just to verify:
Does the TMS320F28P650DK ADC-Cores discharge the internal S+H-Capacitor Ch (to VREFLO/GND level) before sampling?
(Never, maybe just after starting a ADC chain or maybe always)?
Datasheet says no, or i cound´t find something in this direction.
But there are some guides out there (Building the SAR ADC model | Video | TI.com) which discharge before sampling.
So woulkd be great to verify, that they truly dont discharge.
With best regards,
Martin
