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TMS320F28377D: -

Part Number: TMS320F28377D
Other Parts Discussed in Thread: TIDA-01606

Tool/software:

Having problems achieving the PLL operation.

I;m mainly looking into the TIDA-01606 for inverter operation.

My goal is to run inverter operation that is connected to the grid. (380Vrms line to line, 60Hz)

 // Read ADC results
    VA = ADC_readResult(ADCBRESULT_BASE, ADC_SOC_NUMBER0);
    VB = ADC_readResult(ADCBRESULT_BASE, ADC_SOC_NUMBER1);
    VC = ADC_readResult(ADCBRESULT_BASE, ADC_SOC_NUMBER2);

    // DATA should be centered at 0 while having peak of 1 or -1.
    // SInce the ABC to DQ0 transformation is going to happen. sine-wave
    VA_pu = ((float32_t)VA - Vgrid_Sense_Offset_A) / Vgrid_Sense_peak2peak_A;  // 변수 변경 가능
    VB_pu = ((float32_t)VB - Vgrid_Sense_Offset_B) / Vgrid_Sense_peak2peak_B;
    VC_pu = ((float32_t)VC - Vgrid_Sense_Offset_C) / Vgrid_Sense_peak2peak_C;

using the above code and the ADCSOC.

void initADCSOC(void)
{
    uint16_t acqps = 14; // Acquisition window size

    // Configure SOCs to be triggered by CPU Timer 0 interrupt
    ADC_setupSOC(ADCB_BASE, ADC_SOC_NUMBER0, ADC_TRIGGER_EPWM1_SOCA,
                 ADC_CH_ADCIN0, acqps);    // Pin B0
    ADC_setupSOC(ADCB_BASE, ADC_SOC_NUMBER1, ADC_TRIGGER_EPWM1_SOCA,
                 ADC_CH_ADCIN14, acqps);   // Pin B14
    ADC_setupSOC(ADCB_BASE, ADC_SOC_NUMBER2, ADC_TRIGGER_EPWM1_SOCA,
                 ADC_CH_ADCIN15, acqps);   // Pin B15

    // Configure interrupt to occur after SOC2 conversion
    ADC_setInterruptSource(ADCB_BASE, ADC_INT_NUMBER1, ADC_SOC_NUMBER2);
    ADC_enableInterrupt(ADCB_BASE, ADC_INT_NUMBER1);
    ADC_clearInterruptStatus(ADCB_BASE, ADC_INT_NUMBER1);
}

the sensed values are quite similiar to the sine-wave. like below.

similar to the LAB1-4 of the TIDA-01606,

the sensed values are transformed to DQ0 form using the ABC to DQ0 POS.h (from the ti's library) function.

    // Perform ABC to DQ0 transformation
    ABC_DQ0_POS_run(&Vgrid_abc2dq0_pos,
                    VA_pu, VB_pu, VC_pu,
                    sine_VAL, cosine_VAL);

and run SPLL using spll_3ph_srf.h 

    // Run the SPLL algorithm
    SPLL_3PH_SRF_run(Vgrid_abc2dq0_pos.q, &grid_SPLL);

    // Update the angle from SPLL
    angleSPLL_radians = grid_SPLL.theta[0];
    sine_VAL = sinf(angleSPLL_radians);
    cosine_VAL = cosf(angleSPLL_radians);

finally, run dq0 to abc to generate a duty ratio for phase A, B, C.

 // Perform DQ0 to ABC transformation to get inverter voltage references
    DQ0_ABC_run(&Vgrid_dq02abc,
                Vd_pu, Vq_pu, Vz_pu,
                sine_VAL, cosine_VAL);

    //DQ0 to ABC 
    duty_A = (Vgrid_dq02abc.a * 0.5f) + 0.5f;
    duty_B = (Vgrid_dq02abc.b * 0.5f) + 0.5f;
    duty_C = (Vgrid_dq02abc.c * 0.5f) + 0.5f;

    // 12. Clip duty cycles to [0, 1]
    duty_A = fminf(fmaxf(duty_A, 0.1f), 0.9f);
    duty_B = fminf(fmaxf(duty_B, 0.1f), 0.9f);
    duty_C = fminf(fmaxf(duty_C, 0.1f), 0.9f);

    //sine values to DUTY
    uint16_t cmpValueA = (uint16_t)(EPWM_TIMER_TBPRD * duty_A);
    uint16_t cmpValueB = (uint16_t)(EPWM_TIMER_TBPRD * duty_B);
    uint16_t cmpValueC = (uint16_t)(EPWM_TIMER_TBPRD * duty_C);

well, I think the PLL operation and the flow is right but, the result of this didn't generate the sine-wave. rather it produced a distorted wave.

I setted the coefficients same as the example part 

 // Adjust coeffiecients. TI's library follow.
    grid_SPLL.lpf_coeff.b0 = 333.807f;
    grid_SPLL.lpf_coeff.b1 = -333.674f;

and also with the d.q.z values.

//DQ0 to ABC
const float32_t Vd_pu = 0.835f;
const float32_t Vq_pu = 0.0f;
const float32_t Vz_pu = 0.0f;

is there any advice to achieve the pll operation with the grid-tied inverter?

THANKS.

  • what do you mean by distorted waveform? The waveforms shown above seem to be similar.

    Best regards,

    Pawan

  • Sorry for not posting enough information about the errors.

    1. the code for sensing is just same as the above. use ADC for sensing grid voltage and then normalize it.

    2. next use ABC to DQ0 transform => run SPLL => transform DQ0 to ABC "here is done by using the ti's library"

    3. delay 10 seconds for proper PLL operation and after that update the CMPA values to the gate signals so that sine wave can be generated.

    During the 1-step, (which is sensing and normalizing), the result was good as I expected. as the figure below.

    This result was achieved using the CCS's graph tool using the below code.

        if(Result_idx<BUF_LENGTH){
            CHECK[Result_idx] = VA_pu;
            CHECK2[Result_idx] =duty_A;
            CHECK3[Result_idx] =cmpValueA;
            Result_idx++;
        }

    so I think that the sensing and the normalizing doesn't seems to be a problem.

    Next, to see if the transformation and the spll is malfunctioning, I looked at the theta value of the spll.

        // Initialize SPLL
        duty_A = 0.5f;
        duty_B = 0.5f;
        duty_C = 0.5f;
        sine_VAL =  0.0f;
        cosine_VAL = 1.0f;
        delta_t = 1.0f / ISR_FREQUENCY;
        SPLL_3PH_SRF_init (RAMP_FREQUENCY, delta_t, &grid_SPLL);

    the SPLL is initilized with this values and the theta in the figure is just from this code.

    // Update the angle from SPLL
        angleSPLL_radians = grid_SPLL.theta[1];
        sine_VAL = sinf(angleSPLL_radians);
        cosine_VAL = cosf(angleSPLL_radians);
    

    From this sequence, I think the output of the phase voltage should follow the sine wave. but the result of it is somehow distorted.

    the blue (CH.2) is the sensed grid voltage (220Vrms, 60Hz) and the yellow(CH.1) is the phase voltage I genereated using the inverter and the posted code.

    is there any advice to achieve the pll operation with the grid-tied inverter?

    THANK for reading the posted question.

  • Thank you for the clarification. What are the updates done to the code compared to the TIDA-01606 example? Can you also try with 50Hz grid signal and see if this issue reoccurs?

  • I can't generate 50Hz, because the grid voltage is fixed to 60Hz. 

    Compared to TIDA-01606, 

    static inline void TINV_runISR1_lab4(void)
    {
    
        TINV_readCurrentAndVoltageSignals();
    
        TINV_runTransformOnSensedSignals();
    
        if(TINV_clearPWMTrip == 1)
        {
           TINV_clearPWMTrip = 0;
           TINV_closeGiLoop = 1;
           TINV_HAL_enableGateRST();
           TINV_HAL_clearPWMTripFlags(TINV_Q1_Q3_A_PWM_BASE);
           TINV_HAL_clearPWMTripFlags(TINV_Q2_Q4_A_PWM_BASE);
           TINV_HAL_clearPWMTripFlags(TINV_Q1_Q3_B_PWM_BASE);
           TINV_HAL_clearPWMTripFlags(TINV_Q2_Q4_B_PWM_BASE);
           TINV_HAL_clearPWMTripFlags(TINV_Q1_Q3_C_PWM_BASE);
           TINV_HAL_clearPWMTripFlags(TINV_Q2_Q4_C_PWM_BASE);
        }
    
        TINV_runCurrentLoop();
    
        DQ0_ABC_run(&TINV_vInv_dq0,
                    TINV_vdInv_pu, TINV_vqInv_pu, TINV_vzInv_pu,
                    TINV_sine, TINV_cosine);
    
        TINV_duty_A_pu = TINV_vInv_dq0.a;
        TINV_duty_B_pu = TINV_vInv_dq0.b;
        TINV_duty_C_pu = TINV_vInv_dq0.c;
    
        if(TINV_closeGiLoop == 1)
        {
            TINV_HAL_updatePWMDuty(TINV_duty_A_pu, TINV_duty_B_pu, TINV_duty_C_pu);
        }
        else
        {
            TINV_deadBand = TINV_deadBandMin;
            TINV_HAL_updatePWMDuty(0.5, 0.5, 0.5);
            TINV_HAL_updatePWMDeadBand(TINV_deadBand);
        }
    
        TINV_runSPLL(TINV_vGrid_dq0_pos.d,
                    TINV_vGrid_dq0_neg.d,
                    TINV_vGrid_dq0_pos.q,
                    TINV_vGrid_dq0_neg.q);
    
        TINV_sine = sinf(TINV_angleSPLL_radians);
        TINV_cosine = cosf(TINV_angleSPLL_radians);
    
        if(TINV_startPowerStage == 1)
        {
            if(TINV_vGrid_A_sensed_pu > 0.0f && TINV_vGrid_A_sensed_prev_pu < 0.0f)
            {
                TINV_startPowerStage = 0;
                TINV_closeGiLoop = 1;
                TINV_clearPWMTrip = 1;
            }
        }

    The code above is the code I usually use. which is LAB4.

    Since I;m not using the current loop control, the current control loop is excluded.

    However, the format is same which is 

    the ABC to DQ0 transformation, and SPLL (the TIDA-01606 uses use either DDSRF or SPLL) , then DQ0 to ABC transformation.

    Thanks