TMS320F28379S: CLA - writing values from shared RAM to PWM registers

Milad Khani

Part Number: TMS320F28379S

Tool/software:

Hi,

I have an issue regarding the CLA.

I'm using the CLA to update the PWM registers every cycle. I want it to be as fast as possible to maximize switching frequency.

Before I was calculating the necessary data in the CLA and copied it into the PWM registers. That took about 1.5µs - 2µs.
I decided to transfer the calculations to the CPU so the CLA can concentrate on only updating the registers.

The CPU calculates the data and writes them into shared memory LS1. The CLA then takes these values and writes them into the PWM registers.

I was expecting this to be much faster, but quite the opposite is true. Now the transfer to the PWM register takes 7µs! How is that possible?

This is how the access to the register looked before:

EPWM_setCounterCompareValue(PWM_MODULE_BASE_ADRESS_S1_S2, EPWM_COUNTER_COMPARE_A, CMPA_S1_S2);

with CMPA_S1_S2 being a local variable calculated in the CLA.

And this is how it looks now:

EPWM_setCounterCompareValue(PWM_MODULE_BASE_ADRESS_S1_S2, EPWM_COUNTER_COMPARE_A, cmp_hw_data[cla_current_shadow_index].hw[temp].CMPA_S1_S2);

with cmp_hw_data being a struct located at LS1.

Thanks!

Kind regards,

Milad

over 1 year ago

0 Delaney Woodward over 1 year ago

TI__Mastermind 21040 points

Hi Milad,

Can you open the disassembly view and see the instructions generated for this line? You can do this by connecting the debugger and going to View >> Disassembly while in the CLA context. I suspect that the CLA is becoming overburdened with the struct access.

Also, how are you measuring the performance? Are you capturing timestamps just in the beginning and end of the CLA task?

Best Regards,

Delaney

0 Milad Khani over 1 year ago in reply to Delaney Woodward

Prodigy 50 points

Hi Delaney,

I am generating the assembly files as well. Here the assembly for the function:

;***************************************************************
;* FNAME: _CLATASK_pwm_update           FR SIZE:   4           *
;*                                                             *
;* FUNCTION ENVIRONMENT                                        *
;*                                                             *
;* FUNCTION PROPERTIES                                         *
;*                            4 Auto,  0 SOE     *
;***************************************************************

_CLATASK_pwm_update:
;* MR1   assigned to $O$v1
;* MR0   assigned to _temp
$C$DW$12	.dwtag  DW_TAG_variable
	.dwattr $C$DW$12, DW_AT_name("temp")
	.dwattr $C$DW$12, DW_AT_TI_symbol_name("_temp")
	.dwattr $C$DW$12, DW_AT_type(*$C$DW$T$55)
	.dwattr $C$DW$12, DW_AT_location[DW_OP_reg2]

;* MAR0  assigned to _gpioDataReg
$C$DW$13	.dwtag  DW_TAG_variable
	.dwattr $C$DW$13, DW_AT_name("gpioDataReg")
	.dwattr $C$DW$13, DW_AT_TI_symbol_name("_gpioDataReg")
	.dwattr $C$DW$13, DW_AT_type(*$C$DW$T$64)
	.dwattr $C$DW$13, DW_AT_location[DW_OP_reg0]

;* MR0   assigned to _periodCount
$C$DW$14	.dwtag  DW_TAG_variable
	.dwattr $C$DW$14, DW_AT_name("periodCount")
	.dwattr $C$DW$14, DW_AT_TI_symbol_name("_periodCount")
	.dwattr $C$DW$14, DW_AT_type(*$C$DW$T$45)
	.dwattr $C$DW$14, DW_AT_location[DW_OP_reg2]

;* MR0   assigned to _compCount
$C$DW$15	.dwtag  DW_TAG_variable
	.dwattr $C$DW$15, DW_AT_name("compCount")
	.dwattr $C$DW$15, DW_AT_TI_symbol_name("_compCount")
	.dwattr $C$DW$15, DW_AT_type(*$C$DW$T$45)
	.dwattr $C$DW$15, DW_AT_location[DW_OP_reg2]

;* MR0   assigned to _compCount
$C$DW$16	.dwtag  DW_TAG_variable
	.dwattr $C$DW$16, DW_AT_name("compCount")
	.dwattr $C$DW$16, DW_AT_TI_symbol_name("_compCount")
	.dwattr $C$DW$16, DW_AT_type(*$C$DW$T$45)
	.dwattr $C$DW$16, DW_AT_location[DW_OP_reg2]

;* MR0   assigned to _compCount
$C$DW$17	.dwtag  DW_TAG_variable
	.dwattr $C$DW$17, DW_AT_name("compCount")
	.dwattr $C$DW$17, DW_AT_TI_symbol_name("_compCount")
	.dwattr $C$DW$17, DW_AT_type(*$C$DW$T$45)
	.dwattr $C$DW$17, DW_AT_location[DW_OP_reg2]

;* MR0   assigned to _compCount
$C$DW$18	.dwtag  DW_TAG_variable
	.dwattr $C$DW$18, DW_AT_name("compCount")
	.dwattr $C$DW$18, DW_AT_TI_symbol_name("_compCount")
	.dwattr $C$DW$18, DW_AT_type(*$C$DW$T$45)
	.dwattr $C$DW$18, DW_AT_location[DW_OP_reg2]

;* MR0   assigned to _compCount
$C$DW$19	.dwtag  DW_TAG_variable
	.dwattr $C$DW$19, DW_AT_name("compCount")
	.dwattr $C$DW$19, DW_AT_TI_symbol_name("_compCount")
	.dwattr $C$DW$19, DW_AT_type(*$C$DW$T$45)
	.dwattr $C$DW$19, DW_AT_location[DW_OP_reg2]

;* MR0   assigned to _compCount
$C$DW$20	.dwtag  DW_TAG_variable
	.dwattr $C$DW$20, DW_AT_name("compCount")
	.dwattr $C$DW$20, DW_AT_TI_symbol_name("_compCount")
	.dwattr $C$DW$20, DW_AT_type(*$C$DW$T$45)
	.dwattr $C$DW$20, DW_AT_location[DW_OP_reg2]

;* MR0   assigned to _compCount
$C$DW$21	.dwtag  DW_TAG_variable
	.dwattr $C$DW$21, DW_AT_name("compCount")
	.dwattr $C$DW$21, DW_AT_TI_symbol_name("_compCount")
	.dwattr $C$DW$21, DW_AT_type(*$C$DW$T$45)
	.dwattr $C$DW$21, DW_AT_location[DW_OP_reg2]

;* MR0   assigned to _compCount
$C$DW$22	.dwtag  DW_TAG_variable
	.dwattr $C$DW$22, DW_AT_name("compCount")
	.dwattr $C$DW$22, DW_AT_TI_symbol_name("_compCount")
	.dwattr $C$DW$22, DW_AT_type(*$C$DW$T$45)
	.dwattr $C$DW$22, DW_AT_location[DW_OP_reg2]

;* MAR0  assigned to _gpioDataReg
$C$DW$23	.dwtag  DW_TAG_variable
	.dwattr $C$DW$23, DW_AT_name("gpioDataReg")
	.dwattr $C$DW$23, DW_AT_TI_symbol_name("_gpioDataReg")
	.dwattr $C$DW$23, DW_AT_type(*$C$DW$T$64)
	.dwattr $C$DW$23, DW_AT_location[DW_OP_reg0]

	.dwpsn	file "../Source/cla_tasks.cla",line 60,column 5,is_stmt,isa 0
        MMOVZ16   MR0,@_next_halfwave   ; [CPU_FPU] |60| 
        MMOVXI    MR1,#1                ; [CPU_FPU] |60| 
        MLSL32    MR0,#16               ; [CPU_FPU] |60| 
        MASR32    MR0,#16               ; [CPU_FPU] |60| 
        MADD32    MR0,MR1,MR0           ; [CPU_FPU] |60| 
        MMOV16    @_next_halfwave,MR0   ; [CPU_FPU] |60| 
        MNOP      ; [CPU_FPU] 
        MMOVIZ    MR1,#0                ; [CPU_FPU] |60| 
        MMOVXI    MR1,#4                ; [CPU_FPU] |60| 
        MMOVZ16   MR0,@_next_halfwave   ; [CPU_FPU] |60| 
        MLSL32    MR0,#16               ; [CPU_FPU] |60| 
        MASR32    MR0,#16               ; [CPU_FPU] |60| 
        MCMP32    MR1,MR0               ; [CPU_FPU] |60| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L2,GT              ; [CPU_FPU] |60| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |60| 
	.dwpsn	file "../Source/cla_tasks.cla",line 63,column 9,is_stmt,isa 0
        MMOVIZ    MR0,#0                ; [CPU_FPU] |63| 
        MMOV16    @_next_halfwave,MR0   ; [CPU_FPU] |63| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
	.dwpsn	file "../Source/cla_tasks.cla",line 67,column 9,is_stmt,isa 0
        MMOVIZ    MR1,#0                ; [CPU_FPU] |67| 
        MMOVZ16   MR0,@_new_pwm_values_available ; [CPU_FPU] |67| 
        MLSL32    MR0,#16               ; [CPU_FPU] |67| 
        MASR32    MR0,#16               ; [CPU_FPU] |67| 
        MCMP32    MR1,MR0               ; [CPU_FPU] |67| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L1,NEQ             ; [CPU_FPU] |67| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |67| 
        MMOVIZ    MR0,#0                ; [CPU_FPU] 
        MBCNDD    $C$L3,UNC             ; [CPU_FPU] 
        MMOV16    @_transitioning,MR0   ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
	.dwpsn	file "../Source/cla_tasks.cla",line 64,column 9,is_stmt,isa 0
        MMOVIZ    MR1,#0                ; [CPU_FPU] |64| 
        ; branch occurs ; [] 
$C$L1:    
	.dwpsn	file "../Source/cla_tasks.cla",line 70,column 13,is_stmt,isa 0
        MMOVXI    MR0,#1                ; [CPU_FPU] |70| 
        MMOV16    @_pwm_values_updating,MR0 ; [CPU_FPU] |70| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
	.dwpsn	file "../Source/cla_tasks.cla",line 72,column 13,is_stmt,isa 0
        MMOVZ16   MR0,@_cpu_current_shadow_index ; [CPU_FPU] |72| 
        MLSL32    MR0,#16               ; [CPU_FPU] |72| 
        MASR32    MR0,#16               ; [CPU_FPU] |72| 
        MMOV16    @_cla_current_shadow_index,MR0 ; [CPU_FPU] |72| 
	.dwpsn	file "../Source/cla_tasks.cla",line 74,column 13,is_stmt,isa 0
        MMOVXI    MR0,#1                ; [CPU_FPU] |74| 
        MMOV16    @_transitioning,MR0   ; [CPU_FPU] |74| 
	.dwpsn	file "../Source/cla_tasks.cla",line 80,column 13,is_stmt,isa 0
        MMOVIZ    MR0,#0                ; [CPU_FPU] |80| 
        MMOV16    @_new_pwm_values_available,MR0 ; [CPU_FPU] |80| 
	.dwpsn	file "../Source/cla_tasks.cla",line 81,column 13,is_stmt,isa 0
        MMOVIZ    MR0,#0                ; [CPU_FPU] |81| 
        MMOV16    @_pwm_values_updating,MR0 ; [CPU_FPU] |81| 
        MBCNDD    $C$L3,UNC             ; [CPU_FPU] |81| 
        MNOP      ; [CPU_FPU] 
	.dwpsn	file "../Source/cla_tasks.cla",line 74,column 13,is_stmt,isa 0
        MMOVIZ    MR1,#0                ; [CPU_FPU] |74| 
        MMOVXI    MR1,#1                ; [CPU_FPU] |74| 
	.dwpsn	file "../Source/cla_tasks.cla",line 81,column 13,is_stmt,isa 0
        ; branch occurs ; [] |81| 
$C$L2:    
        MMOVZ16   MR1,@_transitioning   ; [CPU_FPU] 
        MLSL32    MR1,#16               ; [CPU_FPU] 
        MASR32    MR1,#16               ; [CPU_FPU] 
$C$L3:    
	.dwpsn	file "../Source/cla_tasks.cla",line 90,column 5,is_stmt,isa 0
        MMOVZ16   MR2,@_next_halfwave   ; [CPU_FPU] |90| 
        MLSL32    MR2,#16               ; [CPU_FPU] |90| 
        MMOVXI    MR3,#1                ; [CPU_FPU] |90| 
        MASR32    MR2,#16               ; [CPU_FPU] |90| 
        MMOV32    MR0,MR2               ; [CPU_FPU] |90| 
        MLSR32    MR0,#31               ; [CPU_FPU] |90| 
        MADD32    MR0,MR0,MR2           ; [CPU_FPU] |90| 
        MMOV32    @__cla_CLATASK_pwm_update_sp+0,MR0 ; [CPU_FPU] |90| 
        MMOVIZ    MR0,#65535            ; [CPU_FPU] |90| 
        MMOVXI    MR0,#65535            ; [CPU_FPU] |90| 
        MXOR32    MR0,MR3,MR0           ; [CPU_FPU] |90| 
        MMOV32    MR3,@__cla_CLATASK_pwm_update_sp+0 ; [CPU_FPU] |90| 
        MAND32    MR0,MR0,MR3           ; [CPU_FPU] |90| 
        MSUB32    MR0,MR2,MR0           ; [CPU_FPU] |90| 
	.dwpsn	file "../Source/cla_tasks.cla",line 92,column 5,is_stmt,isa 0
        MMOVIZ    MR2,#0                ; [CPU_FPU] |92| 
        MCMP32    MR2,MR1               ; [CPU_FPU] |92| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L4,EQ              ; [CPU_FPU] |92| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |92| 
        MMOVZ16   MR1,@_next_halfwave   ; [CPU_FPU] |92| 
        MMOVIZ    MR2,#0                ; [CPU_FPU] |92| 
        MLSL32    MR1,#16               ; [CPU_FPU] |92| 
        MMOVXI    MR2,#2                ; [CPU_FPU] |92| 
        MASR32    MR1,#16               ; [CPU_FPU] |92| 
        MCMP32    MR2,MR1               ; [CPU_FPU] |92| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L5,GT              ; [CPU_FPU] |92| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |92| 
$C$L4:    
	.dwpsn	file "../Source/cla_tasks.cla",line 94,column 9,is_stmt,isa 0
        MMOVXI    MR1,#2                ; [CPU_FPU] |94| 
        MADD32    MR0,MR1,MR0           ; [CPU_FPU] |94| 
$C$L5:    
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/gpio.h",line 469,column 9,is_stmt,isa 0
        MMOVIZ    MR1,#0                ; [CPU_FPU] |469| 
        MMOVXI    MR1,#8                ; [CPU_FPU] |469| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2171,column 1,is_stmt,isa 0
        MLSL32    MR0,#16               ; [CPU_FPU] |2171| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/gpio.h",line 469,column 9,is_stmt,isa 0
        MMOV32    @__cla_CLATASK_pwm_update_sp+0,MR1 ; [CPU_FPU] |469| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2171,column 1,is_stmt,isa 0
        MMOVIZ    MR3,#0                ; [CPU_FPU] |2171| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/gpio.h",line 469,column 9,is_stmt,isa 0
        MMOVXI    MR1,#32554            ; [CPU_FPU] |469| 
        MMOV16    MAR0,MR1,#0           ; [CPU_FPU] |469| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2171,column 1,is_stmt,isa 0
        MASR32    MR0,#16               ; [CPU_FPU] |2171| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/gpio.h",line 469,column 9,is_stmt,isa 0
        MMOV32    MR2,@__cla_CLATASK_pwm_update_sp+0 ; [CPU_FPU] |469| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2171,column 1,is_stmt,isa 0
        MMOVIZ    MR1,#0                ; [CPU_FPU] |2171| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/gpio.h",line 469,column 9,is_stmt,isa 0
        MMOV32    *MAR0,MR2             ; [CPU_FPU] |469| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2171,column 1,is_stmt,isa 0
        MMOVXI    MR1,#18               ; [CPU_FPU] |2171| 
        MMOVIZ    MR2,#0                ; [CPU_FPU] |2171| 
$C$L6:    
        MMOVXI    MR3,#1                ; [CPU_FPU] |2171| 
        MAND32    MR3,MR3,MR1           ; [CPU_FPU] |2171| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L7,EQ              ; [CPU_FPU] |2171| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |2171| 
        MADD32    MR2,MR2,MR0           ; [CPU_FPU] |2171| 
$C$L7:    
        MLSL32    MR0,#1                ; [CPU_FPU] |2171| 
        MLSR32    MR1,#1                ; [CPU_FPU] |2171| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L6,NEQ             ; [CPU_FPU] |2171| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |2171| 
        MMOV32    @__cla_CLATASK_pwm_update_sp+2,MR2 ; [CPU_FPU] |2171| 
        MMOVZ16   MR0,@_cla_current_shadow_index ; [CPU_FPU] |2171| 
        MMOVXI    MR1,#72               ; [CPU_FPU] |2171| 
        MMOVIZ    MR3,#0                ; [CPU_FPU] |2171| 
        MMOVIZ    MR2,#0                ; [CPU_FPU] |2171| 
        MLSL32    MR0,#16               ; [CPU_FPU] |2171| 
        MASR32    MR0,#16               ; [CPU_FPU] |2171| 
$C$L8:    
        MMOVXI    MR3,#1                ; [CPU_FPU] |2171| 
        MAND32    MR3,MR3,MR1           ; [CPU_FPU] |2171| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L9,EQ              ; [CPU_FPU] |2171| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |2171| 
        MADD32    MR2,MR2,MR0           ; [CPU_FPU] |2171| 
$C$L9:    
        MLSL32    MR0,#1                ; [CPU_FPU] |2171| 
        MLSR32    MR1,#1                ; [CPU_FPU] |2171| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L8,NEQ             ; [CPU_FPU] |2171| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |2171| 
        MMOV32    MR0,@__cla_CLATASK_pwm_update_sp+2 ; [CPU_FPU] |2171| 
        MADD32    MR0,MR0,MR2           ; [CPU_FPU] |2171| 
        MMOV16    MAR0,MR0,#_cmp_hw_data+16 ; [CPU_FPU] |2171| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MI32TOF32 MR0,*MAR0             ; [CPU_FPU] |2171| 
        MADDF32   MR0,MR0,#49024        ; [CPU_FPU] |2171| 
        MF32TOUI16 MR0,MR0              ; [CPU_FPU] |2171| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2180,column 5,is_stmt,isa 0
        MMOV16    @0x4063,MR0           ; [CPU_FPU] |2180| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2422,column 1,is_stmt,isa 0
        MMOVXI    MR1,#72               ; [CPU_FPU] |2422| 
        MMOVIZ    MR3,#0                ; [CPU_FPU] |2422| 
        MMOVIZ    MR2,#0                ; [CPU_FPU] |2422| 
        MMOVZ16   MR0,@_cla_current_shadow_index ; [CPU_FPU] |2422| 
        MLSL32    MR0,#16               ; [CPU_FPU] |2422| 
        MASR32    MR0,#16               ; [CPU_FPU] |2422| 
$C$L10:    
        MMOVXI    MR3,#1                ; [CPU_FPU] |2422| 
        MAND32    MR3,MR3,MR1           ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L11,EQ             ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |2422| 
        MADD32    MR2,MR2,MR0           ; [CPU_FPU] |2422| 
$C$L11:    
        MLSL32    MR0,#1                ; [CPU_FPU] |2422| 
        MLSR32    MR1,#1                ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L10,NEQ            ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |2422| 
        MMOV32    MR0,@__cla_CLATASK_pwm_update_sp+2 ; [CPU_FPU] |2422| 
        MADD32    MR0,MR0,MR2           ; [CPU_FPU] |2422| 
        MMOV16    MAR0,MR0,#_cmp_hw_data ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MMOV32    MR0,*MAR0             ; [CPU_FPU] |2422| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2444,column 9,is_stmt,isa 0
        MMOV16    @0x406b,MR0           ; [CPU_FPU] |2444| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2422,column 1,is_stmt,isa 0
        MMOVXI    MR1,#72               ; [CPU_FPU] |2422| 
        MMOVIZ    MR3,#0                ; [CPU_FPU] |2422| 
        MMOVIZ    MR2,#0                ; [CPU_FPU] |2422| 
        MMOVZ16   MR0,@_cla_current_shadow_index ; [CPU_FPU] |2422| 
        MLSL32    MR0,#16               ; [CPU_FPU] |2422| 
        MASR32    MR0,#16               ; [CPU_FPU] |2422| 
$C$L12:    
        MMOVXI    MR3,#1                ; [CPU_FPU] |2422| 
        MAND32    MR3,MR3,MR1           ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L13,EQ             ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |2422| 
        MADD32    MR2,MR2,MR0           ; [CPU_FPU] |2422| 
$C$L13:    
        MLSL32    MR0,#1                ; [CPU_FPU] |2422| 
        MLSR32    MR1,#1                ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L12,NEQ            ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |2422| 
        MMOV32    MR0,@__cla_CLATASK_pwm_update_sp+2 ; [CPU_FPU] |2422| 
        MADD32    MR0,MR0,MR2           ; [CPU_FPU] |2422| 
        MMOV16    MAR0,MR0,#_cmp_hw_data+2 ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MMOV32    MR0,*MAR0             ; [CPU_FPU] |2422| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2444,column 9,is_stmt,isa 0
        MMOV16    @0x406d,MR0           ; [CPU_FPU] |2444| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2422,column 1,is_stmt,isa 0
        MMOVXI    MR1,#72               ; [CPU_FPU] |2422| 
        MMOVIZ    MR3,#0                ; [CPU_FPU] |2422| 
        MMOVIZ    MR2,#0                ; [CPU_FPU] |2422| 
        MMOVZ16   MR0,@_cla_current_shadow_index ; [CPU_FPU] |2422| 
        MLSL32    MR0,#16               ; [CPU_FPU] |2422| 
        MASR32    MR0,#16               ; [CPU_FPU] |2422| 
$C$L14:    
        MMOVXI    MR3,#1                ; [CPU_FPU] |2422| 
        MAND32    MR3,MR3,MR1           ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L15,EQ             ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |2422| 
        MADD32    MR2,MR2,MR0           ; [CPU_FPU] |2422| 
$C$L15:    
        MLSL32    MR0,#1                ; [CPU_FPU] |2422| 
        MLSR32    MR1,#1                ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L14,NEQ            ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |2422| 
        MMOV32    MR0,@__cla_CLATASK_pwm_update_sp+2 ; [CPU_FPU] |2422| 
        MADD32    MR0,MR0,MR2           ; [CPU_FPU] |2422| 
        MMOV16    MAR0,MR0,#_cmp_hw_data+4 ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MMOV32    MR0,*MAR0             ; [CPU_FPU] |2422| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2444,column 9,is_stmt,isa 0
        MMOV16    @0x416b,MR0           ; [CPU_FPU] |2444| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2422,column 1,is_stmt,isa 0
        MMOVXI    MR1,#72               ; [CPU_FPU] |2422| 
        MMOVIZ    MR3,#0                ; [CPU_FPU] |2422| 
        MMOVIZ    MR2,#0                ; [CPU_FPU] |2422| 
        MMOVZ16   MR0,@_cla_current_shadow_index ; [CPU_FPU] |2422| 
        MLSL32    MR0,#16               ; [CPU_FPU] |2422| 
        MASR32    MR0,#16               ; [CPU_FPU] |2422| 
$C$L16:    
        MMOVXI    MR3,#1                ; [CPU_FPU] |2422| 
        MAND32    MR3,MR3,MR1           ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L17,EQ             ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |2422| 
        MADD32    MR2,MR2,MR0           ; [CPU_FPU] |2422| 
$C$L17:    
        MLSL32    MR0,#1                ; [CPU_FPU] |2422| 
        MLSR32    MR1,#1                ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L16,NEQ            ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |2422| 
        MMOV32    MR0,@__cla_CLATASK_pwm_update_sp+2 ; [CPU_FPU] |2422| 
        MADD32    MR0,MR0,MR2           ; [CPU_FPU] |2422| 
        MMOV16    MAR0,MR0,#_cmp_hw_data+6 ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MMOV32    MR0,*MAR0             ; [CPU_FPU] |2422| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2444,column 9,is_stmt,isa 0
        MMOV16    @0x416d,MR0           ; [CPU_FPU] |2444| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2422,column 1,is_stmt,isa 0
        MMOVXI    MR1,#72               ; [CPU_FPU] |2422| 
        MMOVIZ    MR3,#0                ; [CPU_FPU] |2422| 
        MMOVIZ    MR2,#0                ; [CPU_FPU] |2422| 
        MMOVZ16   MR0,@_cla_current_shadow_index ; [CPU_FPU] |2422| 
        MLSL32    MR0,#16               ; [CPU_FPU] |2422| 
        MASR32    MR0,#16               ; [CPU_FPU] |2422| 
$C$L18:    
        MMOVXI    MR3,#1                ; [CPU_FPU] |2422| 
        MAND32    MR3,MR3,MR1           ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L19,EQ             ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |2422| 
        MADD32    MR2,MR2,MR0           ; [CPU_FPU] |2422| 
$C$L19:    
        MLSL32    MR0,#1                ; [CPU_FPU] |2422| 
        MLSR32    MR1,#1                ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L18,NEQ            ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |2422| 
        MMOV32    MR0,@__cla_CLATASK_pwm_update_sp+2 ; [CPU_FPU] |2422| 
        MADD32    MR0,MR0,MR2           ; [CPU_FPU] |2422| 
        MMOV16    MAR0,MR0,#_cmp_hw_data+8 ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MMOV32    MR0,*MAR0             ; [CPU_FPU] |2422| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2444,column 9,is_stmt,isa 0
        MMOV16    @0x426b,MR0           ; [CPU_FPU] |2444| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2422,column 1,is_stmt,isa 0
        MMOVXI    MR1,#72               ; [CPU_FPU] |2422| 
        MMOVIZ    MR3,#0                ; [CPU_FPU] |2422| 
        MMOVIZ    MR2,#0                ; [CPU_FPU] |2422| 
        MMOVZ16   MR0,@_cla_current_shadow_index ; [CPU_FPU] |2422| 
        MLSL32    MR0,#16               ; [CPU_FPU] |2422| 
        MASR32    MR0,#16               ; [CPU_FPU] |2422| 
$C$L20:    
        MMOVXI    MR3,#1                ; [CPU_FPU] |2422| 
        MAND32    MR3,MR3,MR1           ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L21,EQ             ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |2422| 
        MADD32    MR2,MR2,MR0           ; [CPU_FPU] |2422| 
$C$L21:    
        MLSL32    MR0,#1                ; [CPU_FPU] |2422| 
        MLSR32    MR1,#1                ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L20,NEQ            ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |2422| 
        MMOV32    MR0,@__cla_CLATASK_pwm_update_sp+2 ; [CPU_FPU] |2422| 
        MADD32    MR0,MR0,MR2           ; [CPU_FPU] |2422| 
        MMOV16    MAR0,MR0,#_cmp_hw_data+10 ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MMOV32    MR0,*MAR0             ; [CPU_FPU] |2422| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2444,column 9,is_stmt,isa 0
        MMOV16    @0x426d,MR0           ; [CPU_FPU] |2444| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2422,column 1,is_stmt,isa 0
        MMOVXI    MR1,#72               ; [CPU_FPU] |2422| 
        MMOVIZ    MR3,#0                ; [CPU_FPU] |2422| 
        MMOVIZ    MR2,#0                ; [CPU_FPU] |2422| 
        MMOVZ16   MR0,@_cla_current_shadow_index ; [CPU_FPU] |2422| 
        MLSL32    MR0,#16               ; [CPU_FPU] |2422| 
        MASR32    MR0,#16               ; [CPU_FPU] |2422| 
$C$L22:    
        MMOVXI    MR3,#1                ; [CPU_FPU] |2422| 
        MAND32    MR3,MR3,MR1           ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L23,EQ             ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |2422| 
        MADD32    MR2,MR2,MR0           ; [CPU_FPU] |2422| 
$C$L23:    
        MLSL32    MR0,#1                ; [CPU_FPU] |2422| 
        MLSR32    MR1,#1                ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L22,NEQ            ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |2422| 
        MMOV32    MR0,@__cla_CLATASK_pwm_update_sp+2 ; [CPU_FPU] |2422| 
        MADD32    MR0,MR0,MR2           ; [CPU_FPU] |2422| 
        MMOV16    MAR0,MR0,#_cmp_hw_data+12 ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MMOV32    MR0,*MAR0             ; [CPU_FPU] |2422| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2444,column 9,is_stmt,isa 0
        MMOV16    @0x436b,MR0           ; [CPU_FPU] |2444| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2422,column 1,is_stmt,isa 0
        MMOVXI    MR1,#72               ; [CPU_FPU] |2422| 
        MMOVIZ    MR3,#0                ; [CPU_FPU] |2422| 
        MMOVIZ    MR2,#0                ; [CPU_FPU] |2422| 
        MMOVZ16   MR0,@_cla_current_shadow_index ; [CPU_FPU] |2422| 
        MLSL32    MR0,#16               ; [CPU_FPU] |2422| 
        MASR32    MR0,#16               ; [CPU_FPU] |2422| 
$C$L24:    
        MMOVXI    MR3,#1                ; [CPU_FPU] |2422| 
        MAND32    MR3,MR3,MR1           ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L25,EQ             ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |2422| 
        MADD32    MR2,MR2,MR0           ; [CPU_FPU] |2422| 
$C$L25:    
        MLSL32    MR0,#1                ; [CPU_FPU] |2422| 
        MLSR32    MR1,#1                ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MBCNDD    $C$L24,NEQ            ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        ; branchcc occurs ; [] |2422| 
        MMOV32    MR0,@__cla_CLATASK_pwm_update_sp+2 ; [CPU_FPU] |2422| 
        MADD32    MR0,MR0,MR2           ; [CPU_FPU] |2422| 
        MMOV16    MAR0,MR0,#_cmp_hw_data+14 ; [CPU_FPU] |2422| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MMOV32    MR0,*MAR0             ; [CPU_FPU] |2422| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 2444,column 9,is_stmt,isa 0
        MMOV16    @0x436d,MR0           ; [CPU_FPU] |2444| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/epwm.h",line 4870,column 5,is_stmt,isa 0
        MMOVXI    MR1,#1                ; [CPU_FPU] |4870| 
        MMOVZ16   MR0,@0x40aa           ; [CPU_FPU] |4870| 
        MOR32     MR0,MR1,MR0           ; [CPU_FPU] |4870| 
        MMOV16    @0x40aa,MR0           ; [CPU_FPU] |4870| 
	.dwpsn	file "C:/ti/c2000/C2000Ware_5_01_00_00/driverlib/f2837xs/driverlib/gpio.h",line 465,column 9,is_stmt,isa 0
        MMOVXI    MR0,#32556            ; [CPU_FPU] |465| 
        MMOV16    MAR0,MR0,#0           ; [CPU_FPU] |465| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MMOV32    MR1,@__cla_CLATASK_pwm_update_sp+0 ; [CPU_FPU] |465| 
        MMOV32    *MAR0,MR1             ; [CPU_FPU] |465| 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
        MNOP      ; [CPU_FPU] 
$C$DW$24	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$24, DW_AT_low_pc(0x00)
	.dwattr $C$DW$24, DW_AT_TI_return

        MSTOP     ; [CPU_FPU] 
        ; ireturn occurs ; [] 
	.dwattr $C$DW$11, DW_AT_TI_end_file("../Source/cla_tasks.cla")
	.dwattr $C$DW$11, DW_AT_TI_end_line(0x78)
	.dwattr $C$DW$11, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$11

	.sect	"Cla1Prog:_CLATASK_init_data"
	.align	 2
	.global	_CLATASK_init_data

$C$DW$25	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$25, DW_AT_name("CLATASK_init_data")
	.dwattr $C$DW$25, DW_AT_low_pc(_CLATASK_init_data)
	.dwattr $C$DW$25, DW_AT_high_pc(0x00)
	.dwattr $C$DW$25, DW_AT_TI_symbol_name("_CLATASK_init_data")
	.dwattr $C$DW$25, DW_AT_external
	.dwattr $C$DW$25, DW_AT_TI_begin_file("../Source/cla_tasks.cla")
	.dwattr $C$DW$25, DW_AT_TI_begin_line(0x12)
	.dwattr $C$DW$25, DW_AT_TI_begin_column(0x10)
	.dwattr $C$DW$25, DW_AT_TI_interrupt
	.dwattr $C$DW$25, DW_AT_TI_max_frame_size(0x00)
	.dwpsn	file "../Source/cla_tasks.cla",line 19,column 1,is_stmt,address _CLATASK_init_data,isa 0

	.dwfde $C$DW$CIE, _CLATASK_init_data

So yeah, it is generating a lot of assembly instructions. Would it be better not to use structs in this case?

At the moment I'm setting a GPIO pin and measuring on an oscilloscope. I know it's not the best solution as that creates some overhead, but that is how I did it before and I want to compare the results with the code I was using before.

Kind regards,
Milad

0 Milad Khani over 1 year ago in reply to Milad Khani

Prodigy 50 points

I was able to fix the problem. It was indeed the struct access. Thanks Delaney for the hint. I replaced it with arrays and now I'm working with pointer arithmetics and it's much faster now. I'm talking about < 1us. Very surprised about the speed difference.

0 Delaney Woodward over 1 year ago in reply to Milad Khani

TI__Mastermind 21040 points

Hi Milad,

Glad to hear the issue has been fixed. I will close this thread but feel free to make another one if you run into any more issues.

Best Regards,

Delaney

C2000™︎ microcontrollers

C2000 microcontrollers forum

TMS320F28379S: CLA - writing values from shared RAM to PWM registers