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TMS320F28379D: Turn PWM on and off synchronously

Patrick Ford
Prodigy 30 points
Part Number: TMS320F28379D

Tool/software:

Hello,

In the dual active bridge control application if there is an asymmetric pulse at the start of PWM output and possibly when PWM is turned off, there will be a DC offset in the output which has led to saturation and failed devices.

I have decided to use the TZFRC to disable all PWM outputs when not needed, and to TZCLR when it's time to begin the soft start procedure. I cannot use AQ because the active high complimentary deadband results in high/low output. Stopping or resetting the counter seems to have resulted in bad behavior. I am currently running the Enable check inside PWM1 interrupt, but I don't have to do this.

Since TZ is asynchronous this results in the PWM starting and stopping at any point during the period, which is undesirable.

Desirable behavior is to have a full PWM period on all PWM channels (0 phase shift) when I enable a software flag.

Similarly, a full PWM1 period should complete when disabling the PWM outputs with software flag. Since the phase may not be zero, only PWM1 needs to complete a full period here

Any ideas would be appreciated.

  • 0
    TI__Mastermind 27110 points

    Hi Patrick,

    CLB would be able to do this. You could create a CLB design that takes in the TBCTR=0 event and a software input depending if you want to trip or untrip. The CLB would then synchronize the software input to the TBCTR=0 event and trip / untrip your PWMs accordingly. Let me know if this would work for you.

    Thank you,

    Luke

  • 0 in reply to Luke Jones
    Prodigy 30 points

    I am looking into implementing this but my main confusion is what would be the output configuration of this tile? Since I will need to turn off all PWMs in the device when synchronized to the PWM1 CTR=0 and a software flag (enable), there would be a lot of trip zones to force or clear.

  • +1 in reply to Patrick Ford
    TI__Mastermind 27110 points

    Hi Patrick,

    Instead of routing a PWM output to the GPIO, you would route the CLB output to the GPIO via the Output XBAR. Once you generate your final PWM signal from the CLB using the original PWM signal and the software input.

    Thank you,

    Luke

  • 0 in reply to Luke Jones
    Prodigy 30 points

    OK I understand. So this would require as many CLB XBAR outputs as there are PWMs correct? For this device, there are 4 CLB tiles and each has 2 XBAR outputs, so 8 PWM outputs or 4 A/B pairs is possible?

  • 0 in reply to Patrick Ford
    TI__Mastermind 27110 points

    Yes that's correct, however there's also an output override feature where the CLB output can directly override the PWM output internal to the PWM module. If you use this method, the GPIO mux would still select the PWM output, but the PWM output would be controlled by the CLB. This may provide additional CLB-controlled outputs.

    --Luke

  • 0 in reply to Luke Jones
    Prodigy 30 points

    Thanks, unfortunately this will not work as I need to synchronously turn off 8 PWM modules (multi-phase converter) so I will have to do this in external circuit. I am thinking that I can use the SYNCO X-bar output to gate a D-latch for gate drive enable.

  • 0 in reply to Patrick Ford
    TI__Mastermind 27110 points

    Hi Patrick,

    Understood, let me know if you need assistance implementing the XBAR solution.

    Thank you,

    Luke