Part Number: TMS320F28379D
Other Parts Discussed in Thread: LAUNCHXL-F28379D, C2000WARE
Tool/software:
I am working on firmware updates to a project that is being ported from a F28335 DSP to a F28379D DSP. We used the C2000ware API for SCI GPIO Init, i.e. functions GPIO_setMasterCore, GPIO_setPinConfig, GPIO_setPadConfig, and GPIO_setQualification Mode. The SCI and CAN communications have been working for quite some time on the new processor, both on the proprietary hardware and on the LaunchXL-F28379D boards we have been using to debug communications.
In the last few months a new team member came up with a revised algorithm for initializing GPIO pins. It combines the GPIO pin mux assignment with other GPIO options - input vs. output, pull-up or disable pull-up, ASYNCH vs. SYNC, init state high or low, etc. The new scheme seems to work fine for everything except when SCIB GPIO pins are assigned to GPIO18 and GPIO19 for testing on a LaunchXL-F28379D board, but it works correctly when using GPIO137 and GPIO138, to which SCIB is wired on the new proprietary board. I have been debugging the new GPIO initialization scheme to try to find out why GPIO19 fails to receive when using the new initialization scheme.
All the rest of the firmware application is unchanged. Only the new GPIO initialization method is different. I have verified with the CCS debugger that SYSCLK and LSPCLK are unchanged, both at 200 MHz,and baud rate is set correctly. The pinmux bit field assignment for GPIO_18_SCITXDB is 0x00080402U and for GPIO_19_SCIRXDB is 0x00080602U. For both the working and non-working firmware versions, GPIO control register contents for GPIO18 and GPIO19 are as follows:
GPIO18 GPIO19
GPAQSEL2: 0x11 0x11
GPAMUX2: 0x10 0x10
GPADIR: 0x1 0x0
GPAPUD: 0x1 0x0
All other control register entries for the two GPIO pins are 0.
With these register settings, the old GPIO initialization results in solid communications at 115200 baud, 8 bits, no parity, one stop bit. When initialized with the new approach, SCIB fails to receive data.
Is there a GPIO configuration component that I am overlooking that could be causing failure to receive when executing firmware with the new GPIO initialization approach?

