Other Parts Discussed in Thread: C2000WARE
Tool/software:
Dear Team,
I have TMS320F28335 and I want to configure external interrupt on GPIO12,GPIO13 and GPIO16.
GPIO12 and GPIO13 are working fine but GPIO16 is not working.
Below is the my configuration please let me know what configuration is missing.
Best and regards,
Dipak/**
* @brief: External GPIO Interrupt ISR
* @param[in]
* @param[out]
*/
__interrupt void vGpioIntr1ISR(void)
{
if(++u16Int1counter>2000)
{
GpioDataRegs.GPBTOGGLE.bit.GPIO36 = 1;
u16Int1counter= 0;
}
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}
/**
* @brief: External GPIO Interrupt ISR
* @param[in]
* @param[out]
*/
__interrupt void vGpioIntr2ISR(void)
{
if(++u16Int2counter>2000)
{
GpioDataRegs.GPBTOGGLE.bit.GPIO36 = 1;
u16Int2counter= 0;
}
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}
/**
* @brief: External GPIO Interrupt ISR
* @param[in]
* @param[out]
*/
__interrupt void vGpioIntr3ISR(void)
{
if(++u16Int3counter>100)
{
GpioDataRegs.GPBTOGGLE.bit.GPIO50 = 1;
u16Int3counter= 0;
}
PieCtrlRegs.PIEACK.all = PIEACK_GROUP12;
}
void vInitXInterruptConfig(void)
{
//============================================= External Interrupt ==============================================================================================
// External Interuupt
//dsp_pwm_rx1 : GPIO12
//dsp_pwm_rx2: GPIO13
//dsp_pwm_rx3: GPIO16
EALLOW;
PieVectTable.XINT1 = &vGpioIntr1ISR;// register ISR in interrupt vector table
PieVectTable.XINT2 = &vGpioIntr2ISR;
PieVectTable.XINT3 = &vGpioIntr3ISR;
EDIS;
PieCtrlRegs.PIECTRL.bit.ENPIE = 1;// Enable PIE block
PieCtrlRegs.PIEIER1.bit.INTx4 = 1;// Enable PIE Group 1 INT4
PieCtrlRegs.PIEIER1.bit.INTx5 = 1;// Enable PIE Group 1 INT5
PieCtrlRegs.PIEIER1.bit.INTx6 = 1;// Enable PIE Group 1 INT6
IER |= M_INT1; // Enable CPU interrupt 1
EINT; // Enable Global Interrupt
//
// GPIO12, GPIO13 and GPIO16 are inputs
//
EALLOW;
GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO12 = 0;
GpioCtrlRegs.GPAQSEL1.bit.GPIO12 = 0; //Xint1 Synch to SYSCLKOUT only
GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO13 = 0;
GpioCtrlRegs.GPAQSEL1.bit.GPIO13 = 0;
GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO16 = 0;
GpioCtrlRegs.GPAQSEL2.bit.GPIO16 = 0;
//
// Each sampling window is 510*SYSCLKOUT
//
GpioCtrlRegs.GPACTRL.bit.QUALPRD0 = QUAL_PERIOD_CONFIG;//Each Sample window is 510*SYSCLKOUT
EDIS;
EALLOW;
GpioIntRegs.GPIOXINT1SEL.bit.GPIOSEL = 12; //tag XINT1 interrupt with GPIO12
GpioIntRegs.GPIOXINT2SEL.bit.GPIOSEL = 13; //tag XINT2 interrupt with GPIO13
GpioIntRegs.GPIOXINT3SEL.bit.GPIOSEL = 16; //tag XINT3 interrupt with GPIO16
EDIS;
XIntruptRegs.XINT1CR.bit.POLARITY = 1;//Detect interrupt on rising edge of GPIO12
XIntruptRegs.XINT2CR.bit.POLARITY = 1;//Detect interrupt on rising edge of GPIO13
XIntruptRegs.XINT3CR.bit.POLARITY = 1;//Detect interrupt on rising edge of GPIO16
XIntruptRegs.XINT1CR.bit.ENABLE = 1; //Enable XINT1
XIntruptRegs.XINT2CR.bit.ENABLE = 1; //Enable XINT2
XIntruptRegs.XINT3CR.bit.ENABLE = 1; //Enable XINT3
}
