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TMS320F28379D: What is clearing QEPSTS.UPEVNT in eQEP module?

Stephen Crumpler
Prodigy 30 points

Part Number: TMS320F28379D

Tool/software:

Hi,

I am writing code to read motor position and speed info from an encoder on F28379D processor.

I would like to verify the functionality of the UPEVNT flag in the QEPSTS register.

I understand that this flag is set by the eQEP peripheral after a configurable number of QCLK events has occured, where a QCLK event means an edge has been detected on either of the encoder channels.

The description for the UPEVNT flag states:

Unit position event flag

Reset type: SYSRSn

0h (R/W) = No unit position event detected

1h (R/W) = Unit position event detected. Write 1 to clear.

This seems to imply that once set the UPEVNT flag will remain set until a 1 is written to this flag by the software to clear it.

However, in my current software, I do not write to this flag, but I can see by the debugger that it is routinely reset.

So my question is, what is resetting this flag?

Thanks.

  • 0
    TI__Mastermind 24711 points

    Hi Stephen,

    The only mechanism to clear the UPEVNT bit in the status register is to either write to the bit or to reset the EQEP module through the QPEN bit. Can you double check through your implementation to see if you are doing any of these actions. I would also check how you are reading and writing to other bits in the status register. You could be accidentally writing to multiple bits in the register or writing to the register entirely as opposed to just a single bit

    Regards,

    Peter

  • 0 in reply to Peter Luong
    Prodigy 30 points

    mmm. I don't think I'm writing to the UPEVNT flag directly anywhere. 

    I am resetting the COEF flag in the same register using the following code:

    EQep1Regs.QEPSTS.bit.COEF = 1;   /* Clear the counter overrun flag by writing 1 to it */

    Is that somehow writing to the whole register?

    I am also reading the UPEVNT flag with code such as:

    if(EQep1Regs.QEPSTS.bit.UPEVNT == 1)

    But as far as I am aware reading the register or flag should have no effect on the register contents.

    Thanks,
    Steve

  • 0 in reply to Stephen Crumpler
    Prodigy 30 points

    I commented out this line:

    EQep1Regs.QEPSTS.bit.COEF = 1;   /* Clear the counter overrun flag by writing 1 to it */

    so now there are no write to the QEPSTS register, and now the UPEVNT flag is not resetting. So it seem to be this line above that is causing the reset, which i assume means it's writing to the whole register. I don't know why this would be though.

  • 0 in reply to Stephen Crumpler
    TI__Mastermind 24711 points

    Hi Stephen, 

    When you clear the counter overrun flag with that line of code, are both COEF and UPEVNT bits being reset? Which version of the SDK are you using?

    Regards,

    Peter