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F28335 ADC Sample/Hold width question

SBhushan
Intellectual 360 points


Hello All,

 

The F28335 ADC's electrical specification is in Section 6.15.3 (Page 171) of SPRS439I

Figure 6-53 on this page is shown for a specific case of  "Acqps = 0". i.e. t_SH (Sample/Hold width) is 1 ADC clock cycle. The ON period of the SH pulse is therefore 1  ADC clock cycle. But what is the OFF period? The OFF is shown here as 1 clock cycle too, but does it depend on Acqps in any way?I guess not.

This figure could be improved by choosing a non zero value for Acqps and showing how the ON period differs from the OFF period.

 

Thank you.

  • 0
    TI__Guru 60865 points

    SBhushan,

    I believe you are correct; the OFF period will always be 1 cycle.  Note that the table specifies the time to successive results as (2 + ACQPS) * tc(ADCCLK).  Since the S+H length is 1 + ACQPS cycles, the off time is therefore 1 cycle:  (2+ACQPS) - (1 + ACQPS) = 1.      

  • 0 in reply to Devin Cottier
    Intellectual 360 points

    Devin,

    Thank you for your quick and clear response.

    Here is a formula I use to find the exact sample time of a specific conversion number X in sequential sampling mode (SMODE=0), after ADC receives the start of conversion.

    T_Sample(X) = X * tc*( 2 + Acqps)   - tc

    Notation:

    1. X is the conversion number in the sequence. X = 1, 2, ....
    2. tc is ADC CLK period

    Do you know of any TI document showing probability distribution / histogram of the output of an F28335 ADC connected to a clean DC source, with varying values for ACQPS (Sample width)?

     

    Thank you.

  • 0 in reply to SBhushan
    TI__Guru 60865 points

    Hi SBhushan,

    I don't believe the data you are thinking about  are in any TI document.  I would not expect the ACQPS value to have any significant effect on the code spread of a clean DC signal. 

    You can see an input model of the sampling circuit in the F28335 datasheet in figure 6-32.  Depending on the impedance characteristics of the source driving into the ADC channel, you may want to change the ACQPS value to allow the sampling capacitor more time to settle.