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TMS320F28035: What is the gpio status when reset?

Part Number: TMS320F28035

Tool/software:

Hi expert,

My customer want to know when the watchdog trigger the reset, at the falling edge of XRS, waht's the status of gpio?

If the pwm is high level, and the the chip reset, at the falling edge of XRS, what's the level of the pwm gpio? Is it deterministic low or uncontrolled?

Below picture is from F2800137, my customer want to know if there is any difference with F28035: Yellow channel is gpio, Green channel is pwm. When the chip is triggered reset by watchdog, the gpio fall down immediately, and the pwm is oscillating uncontrollably for 530us。

Best Regards

Anka

  • Hi Anka,

    When XRSN is asserted the I/O's transition to high impedance state.

    Will have to check the state during XRSn ramp but that duration is very small it should not contribute to the above mentioned issue.
    I would advise disconnect everything from the device and try the same on the controlcard and just check the pwm output by asserting xrsn pin.

    Thanks