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TMS320F2800157-Q1: How can symmetric PWM pulse skipping be achieved in relation to a reference PWM frequency and duty cycle?

Meet Parikh
Prodigy 171 points

I am working with two PWM signals: PWM1 with a frequency of 25 kHz, Duty 80% and PWM2 with a frequency of 250 kHz duty 50%(which can be adjusted at runtime).

Here is the current approach I am using:

  1. I generate an interrupt from PWM1 on a CMPX event during both up-counting and down-counting phases. The interrupt source is toggled within the ISR, so the first time the interrupt is triggered on the up-count, and the second time it is triggered on the down-count CMPX event.
  2. When the PWM1 counter is counting up and the ISR is executed, a flag is set to 1. During the down-count CMPX interrupt, the flag is set to 0.
  3. I generate an interrupt from PWM2(250Khz) at every CMPX event during the up-count phase.
  4. In the PWM2 ISR, I read the flag set by PWM1. If the flag is 1, PWM2 (250 kHz) is enabled using the TZ module. If the flag is 0, PWM2 is turned off using the TZ module.

Observation:

  • The PWM signal is on at the start and off at the end, but this does not maintain a symmetric PWM pattern.

Issue:

  • How can I achieve symmetric PWM switching, ensuring the PWM turns on and off in a symmetric manner? Please suggest methods to achieve symmetric PWM.
  • 0
    Prodigy 171 points

    Dear TI Experts, Any thoughts on this issue?

  • +1 in reply to Meet Parikh
    TI__Mastermind 25696 points

    Hi Meet,

    TZ module is mostly used for asynchronous events to turn off the PWMs or on. If you're needed a symmetric manner, you could instead try using AQCSFRC with a shadow load mode on ZRO or PRD depending on your use case.

    When setting this shadow load mode to ZRO or PRD, and when writing to the continuous software force, it will turn off the PWM on the next ZRO or PRD event. That way you keep your symmetric waveforms, and your PWMS will shut off together at the start of the next PWM period.

    Does this help?

    Best,

    Ryan Ma 

  • 0 in reply to Ryan Ma
    Prodigy 171 points

    Hi Ryan Ma,

    I have tried to use the AQCSFRC with shadow load mode on ZRO. but still, you can see last pulse is not symmetric.

    here is my sudo code of PWM2 250Khz ISR (This ISR will be triggered at every TBCTR == CMPA )

    void ISR_PWM1(void)

    {

    if(PulseSkip  == ON)

    {

    /* Software forcing is disabled and has no effect
    * AQCSFRC.CSFA = 11 and AQCSFRC.CSFB = 11 */

    HWREGH(PWM2_BASE + EPWM_O_AQCSFRC) = ( (HWREGH(PWM2_BASE + EPWM_O_AQCSFRC) & ~0xFU) | (0xFU) );

    }

    else

    {

    /* Forces a continuous low on output A and B
    * AQCSFRC.CSFA = 01 and AQCSFRC.CSFB = 01 */

    HWREGH(PWM2_BASE + EPWM_O_AQCSFRC) = ( (HWREGH(PWM2_BASE + EPWM_O_AQCSFRC) & ~0xFU) | (0x5U) );

    }

    }


     


    Observation: PWM2_B output should be on till TBCTR == CMPA but its turning off at AQCSFRC event at shadow to Active on TBCTR == ZRO. 

    Queries:

    1. Unable to achieve symmetric waveform whil turning off PWM output through AQCSFRC register.

    2. What is the difference between EPWM_setActionQualifierShadowLoadMode and EPWM_setActionQualifierContSWForceShadowMode ?

  • 0 in reply to Meet Parikh
    TI__Mastermind 25696 points

    Hi Meet,

    Can you share the AQSFRC.RLDCSF register settings? Is it set to 0x00?

    Are your only AQ settings on CMPAU and CMPAD? I will expect the CMPAD event to finish, then the ZRO event will cause a load to turn off the PWMs.

    Best,

    Ryan Ma

  • +1 in reply to Ryan Ma
    Prodigy 171 points

    Hi Ryan Ma,

    The issue has been resolved. Within the ISR, I’m taking two actions: on the first trigger, I turn off epwmA on the ZERO load event, and on the second, I turn off epwmB on the PRD load event.

  • 0 in reply to Meet Parikh
    TI__Mastermind 25696 points

    Hi Meet, 

    Great to hear, just to confirm did you end up using the AQCSFRC?

    Best,

    Ryan Ma

  • 0 in reply to Ryan Ma
    Prodigy 171 points

    Hi Ryan Ma,

    Yes i have used AQCSFRC action on AQSFRC.RLDCSF = ZERO for AQCSFRC.CSFA and AQSFRC.RLDCSF = PRD for AQCSFRC.CSFB.

    Thank you for giving explanation about AQCSFRC register.

    Thank You,

    Meet P. Parikh  

  • 0 in reply to Meet Parikh
    TI__Mastermind 25696 points

    Hi Meet,

    You're very welcome! I will go ahead and mark this as closed.

    Best,

    Ryan Ma