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TMS320F280039: TI280039 How much space a page takes up

Part Number: TMS320F280039

Tool/software:

Hi,

   Link config:"HEADERINFO        : origin = 0x080010, length = 0x000100"

   Use this address segment,CCS  build error:“program will not fit into available memory, or the section contains a call site that requires a trampoline that can't be generated for this section. placement with alignment/blocking fails for section "CodeInfoFile" size 0xff page 0. ".then link Modify configuration as "HEADERINFO        : origin = 0x080100, length = 0x000100",build success.

   So TI280039 how much space a page takes up?Whether each page is 256?

  • Hi,

    This part will fall in the FLASH_BANK0_SEC0 part. Can you please confirm if no other data is present in these location before loading the .out file.

    Also please have a look at the memory usage console and verify the space in the section.

    You can find the data being loaded in these location from the .map file generated, which is inside the CPU1_FLASH folder.

    If it is possible to share the linker cmd file here, i can debug further on the issue.

    Thanks

    Aswin 

  • Hi Aswin,

        There are other data in FLASH_BANK0_SEC0,you can view the cmd content below.

    MEMORY
    {
       BEGIN            : origin = 0x00080000, length = 0x00000002
       BOOT_RSVD        : origin = 0x00000002, length = 0x00000126
    
       RAMM0            : origin = 0x00000128, length = 0x000002D8
       RAMM1            : origin = 0x00000400, length = 0x000003F8
      
       CLA_PROG_RAM     : origin = 0x008000, length = 0x001800
    
       RAMLS34           : origin = 0x00009800, length = 0x00001000
       RAMLS5           : origin = 0x0000A800, length = 0x00000800
       RAMLS6           : origin = 0x0000B000, length = 0x00000800
       RAMLS7           : origin = 0x0000B800, length = 0x00000800
     
       RAMGS0123           : origin = 0x0000C000, length = 0x00003FF0
      
       BOOTROM          : origin = 0x003F8000, length = 0x00007FC0
       SECURE_ROM       : origin = 0x003F2000, length = 0x00006000
    
       RESET            : origin = 0x003FFFC0, length = 0x00000002
    
       /* Flash sectors */
       /* BANK 0 */
       HEADERINFO        : origin = 0x080010, length = 0x000100, fill 0xFFFF /* on-chip Flash */
       CPU_PROG_FLASH    : origin = 0x080120, length = 0x004EE0		/* on-chip Flash */
    
       CLA1_MSGRAMLOW   : origin = 0x001480, length = 0x000080
       CLA1_MSGRAMHIGH  : origin = 0x001500, length = 0x000080
    }
    
    
    SECTIONS
    {
       codestart        : > BEGIN, ALIGN(8)
       .text            : > CPU_PROG_FLASH,   ALIGN(8)
       .cinit           : > CPU_PROG_FLASH,  ALIGN(8)
       .switch          : > CPU_PROG_FLASH,  ALIGN(8)
       .reset           : > RESET,                  TYPE = DSECT /* not used, */
    
       .stack           : > RAMM1
    
    #if defined(__TI_EABI__)
       .init_array      : > CPU_PROG_FLASH,  ALIGN(8)
       .bss             : > RAMGS0123
       .bss:output      : > RAMGS0123
       .bss:cio         : > RAMGS0123
       .data            : > RAMGS0123
       .sysmem          : > RAMGS0123
       .const           : > CPU_PROG_FLASH,  ALIGN(8)
    #else
       .pinit           : > CPU_PROG_FLASH,  ALIGN(8)
       .ebss            : > RAMGS0123
       .esysmem         : > RAMGS0123
       .cio             : > RAMGS0123
       .econst          : > CPU_PROG_FLASH,  ALIGN(8)
    #endif
    
        ramgs0 : > RAMGS0123
        ramgs1 : > RAMGS0123
    
        /*  Allocate IQ math areas: */
       IQmath           : > CPU_PROG_FLASH, ALIGN(8)
       IQmathTables     : > CPU_PROG_FLASH, ALIGN(8)
    
       /* CLA specific sections */
       Cla1Prog 	   : LOAD = CPU_PROG_FLASH,
    					 RUN = CLA_PROG_RAM,
    					 LOAD_START(Cla1ProgLoadStart),
    					 RUN_START(Cla1ProgRunStart),
    					 LOAD_SIZE(Cla1ProgLoadSize),
    					 ALIGN(8)
    
       Cla1ToCpuMsgRAM  : > CLA1_MSGRAMLOW
       CpuToCla1MsgRAM  : > CLA1_MSGRAMHIGH
    
      GROUP
       {
           .TI.ramfunc
           { -l FAPI_F28003x_EABI_v1.58.10.lib}
    
       }				  LOAD = CPU_PROG_FLASH,
                          RUN = RAMLS34,
                          LOAD_START(RamfuncsLoadStart),
                          LOAD_SIZE(RamfuncsLoadSize),
                          LOAD_END(RamfuncsLoadEnd),
                          RUN_START(RamfuncsRunStart),
                          RUN_SIZE(RamfuncsRunSize),
                          RUN_END(RamfuncsRunEnd),
                          ALIGN(8)
    
       .scratchpad      : > RAMLS7
       .bss_cla         : > RAMLS7
    
        Cla1DataRam     : > RAMLS7
    
        .const_cla      :  LOAD = CPU_PROG_FLASH,
                           RUN = CLA_PROG_RAM,
                           RUN_START(Cla1ConstRunStart),
                           LOAD_START(Cla1ConstLoadStart),
                           LOAD_SIZE(Cla1ConstLoadSize),
                           ALIGN(4)
    
        CodeInfoFile    : > HEADERINFO
    }