Tool/software:
Hello,
Does anyone know what would cause 0.8V logic low Chip select. Please see below image.
Thanks,
Stephen
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Tool/software:
Hello,
Does anyone know what would cause 0.8V logic low Chip select. Please see below image.
Thanks,
Stephen
Hello,
This expert is currently out of office due to holiday. Please expect a delay in response until after 12/4. Thanks for you patience.
Best Regards,
Allison
Ok. Also, I don't see the offset anymore.
Our design has two CPU, which I will name CPU1 and CPU2. DPRAM is used to transfer data between CPU1 and CPU2. There is also two 16 bit SRAM chips that will store 32-bit data. I am getting the following results. Why would data written to DPRAM initially be read back correctly?
Update: The offset was caused by a bad probe.