Other Parts Discussed in Thread: SYSCONFIG
Tool/software:
We need clarification regarding the errata specified for blanking window glitch here:
“ePWM: An ePWM Glitch can Occur if a Trip Remains Active at the End of the Blanking Window”
We see the following warning in sysconfig:
“Errata Advisory: An ePWM glitch can occur if a trip remains active at the end of the Blanking Window”

We have an interrupt signal connected to the one-shot DCAEVT that comes from an over current detection circuit in a buck regulator. This signal will stay low (means over-current) until the PWM for the corresponding MSFET will be switched off by reaction to this event, resulting in no more over current.
We assume that in our case it is not a problem, but we would need clarification on what is the “undesired glitch” mentioned in the errata document. --> Could you please tell us to know if it would have a negative effect for us?
Thanks and best regards
Jens