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TMS320F280049C-Q1: Errata Blanking

Part Number: TMS320F280049C-Q1
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hi Team

We need clarification regarding the errata specified for blanking window glitch here:

“ePWM: An ePWM Glitch can Occur if a Trip Remains Active at the End of the Blanking Window”

We see the following warning in sysconfig:

“Errata Advisory: An ePWM glitch can occur if a trip remains active at the end of the Blanking Window”

We have an interrupt signal connected to the one-shot DCAEVT that comes from an over current detection circuit in a buck regulator. This signal will stay low (means over-current) until the PWM for the corresponding MSFET will be switched off by reaction to this event, resulting in no more over current.

We assume that in our case it is not a problem, but we would need clarification on what is the “undesired glitch” mentioned in the errata document. --> Could you please tell us to know if it would have a negative effect for us?

Thanks and best regards

Jens

  • Hi Jens, I'm trying to find someone who can confirm for you.  I hope to get s response for you tomorrow.

  • Hi Jens,

    To summarize, the errata advisory outlines that if a trip condition begins during a blanking window but is still active beyond the blank window, the trip may not be blanked. Typically, trip signals need to be at least ~3 PWM clock cycles in order to be recognized, but the errata warns that the trip could be recognized even if it only carries over past the blanking window for only 1-3 cycles. So whatever actions you have set to occur in the case of a trip, can occur and change your ePWM outputs accordingly when it recognizes the event as a trip. The errata also displays two different cases that can occur if this happens- the nature of the end result is not necessarily determinate. 

    Could you elaborate a bit more on your concern with your current configurations/setup? Where does your blanking window end with respect to your DCAEVT trip source?

    Best Regards,

    Allison