• State TI Thinks Resolved
  • Locked Locked
  • Replies 6 replies
  • Answers 1 answer
  • Subscribers 83 subscribers
  • Views 511 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28379D: Clearing PWM TZ event through HW

Mojo23
Prodigy 100 points

Part Number: TMS320F28379D
Other Parts Discussed in Thread: C2000WARE

Tool/software:

Hi,

I need to implement a mechanism that will clear a TZ event - but without using the SW.

Timing is critical, so I cannot rely on jumping to an ISR to manage this.

The mechanism needs to clear the TZ event based on CTR=one of the compare registers (ideally that would be CMPC or CMPD, but I can manage with CMPA or B).

The CBC can clear TZ through HW, but only for CTR=PRD or ZRO.

The Oneshot needs SW to clear the TZCLR.bit.OST.

I'm leaning more towards using the oneshot, and have it cleared by CLB (which can check CTR=whatever we want).

is that possible to do with the CLB? can it access the TZCLR.bit.OST ?

Any other HW mechanism that can achieve this requirement?

I need to release PWM1 to 9 at the same time as well, so CLB seems like the only option...

thank you!

  • 0
    TI__Expert 7970 points

    Hi,

    You cannot write TZCLR.bit.OST using CLB. However, you could connect your HW signal to Input X-BAR -> CLBXBAR -> CLB -> EPWMXBAR -> DCAVET1 which would trip the output. 

    The CLB would use an FSM that would get set by your HW signal and get cleared by CMPC/D event.

  • 0 in reply to Stevan Duraskovic
    Prodigy 100 points

    Thanks Steve,

    My problem is not tripping the signal but clearing the TZ at a certain point.

    and in any case I don't need the CLB to do what you propose - I can connect my signal directly to the DCAVET1 through the inputxbar.

    what do you mean by "The CLB would use an FSM that would get set by your HW signal and get cleared by CMPC/D event" ?

    You just said a sentence before that it's not possible to clear the OST with the CLB?

    You got me confused.

    This is a pretty complex situation, so please be accurate with the response.

    thank you

  • 0
    Prodigy 210 points

    1、If your TZ events control PWM via CBC, then you can configure the TZCLR register in the PWM module to automatically clear TZ events at PRD or ZERO. As shown in the following picture.

    2、If your TZ event comes from CMPSS and directly controls PWM through DACEVT1/2, then you can configure the COMPDACCTL[RAMPSOURCE] register in the CMPSS module to automatically clear TZ events at the location set by CMPC or CMPD. As shown in the following picture.

  • 0 in reply to Mojo23
    TI__Expert 7970 points

    Hi,

    Let me explain in more detail.

    The purpose of CLB is to latch the trip signal on a rising edge to maintain a trip signal until CMPC/D event. The CLB's FSM would act as a latch, where it gets set by a rising edge of the trip signal and gets cleared by CMPC/D event. 

    If you just connect through the X-BAR you would not be able to clear the trip the way you want. You would be limited to ZRO or PRD event when using CBC.

  • 0 in reply to Stevan Duraskovic
    Prodigy 100 points

    Thank you both for the suggestions. Both seem implementable and solve the problem.

    Stevan - now I understand what you mean. So you suggest to use the CBC approach, but the FSM can clear it out side of the CTR=ZRO or PRD.

    is there an example or something similar that I can use as reference for designing this FSM?

    I'm trying to figure out now which approach would be more straight forward to implement. I never used the CLB before...

    thank you!

  • 0 in reply to Mojo23
    TI__Expert 7970 points

    Hello,

    You could use DCAEVT.force as suggested previously, and route is as described earlier: "connect your HW trip signal to Input X-BAR -> CLBXBAR -> CLB -> EPWMXBAR -> DCAVET1." That trip would be your input to CLB, and other input would be, in your case, CMPC event since you want to use that one to clear the trip. The output of CLB would be your "actual" trip that you desire to achieve. 

    There are online resources for CLB on C2000 academy, and there are software examples in C2000Ware that you could use as a reference. They could be found under directory: C:\ti\c2000\C2000Ware_5_03_00_00\driverlib\f2837xs\examples\cpu1\clb