TMS320F28388S: INTM and DINT Functionality

Hi Ed,

Ed Sanders said:

In particular, if INTM is cleared, the next instruction in the pipeline will run with interrupts disabled.

This sentence appears to be an error in documentation. It should say "In particular, if INTM is set, the next instruction in the pipeline will run with interrupts disabled." I will make sure this is fixed. The correct behavior should be the following:

INTM = 1: interrupts globally disabled

INTM = 0: interrupt globally enabled

• How are you seeing the interrupt when INTM == 1? Do you have a breakpoint inside the ISR that is being hit or is the IFR or PIEIFR flag getting set? The INTM bit should not prevent the interrupt flags from being set if that is what you are seeing.
• What type of interrupt is it? INTM will not have an effect on NMI interrupts.
• Also, how are you verifying INTM is set when this behavior is happening? Are you calling DINT in your code or are you changing the INTM bit from the debugger?

Best Regards,

Delaney

Hi Delaney,

To answer your questions, could we take the conversation private please?

Thank you,

Ed

Hi,

Delaney is out of office until next week, please expect a delayed response.

Best Regards,

Ben Collier

Hi Ed,

Please feel free to direct message me on E2E. I will close this thread for now.

Best Regards,

Delaney

Hi Delaney,

How do I direct message you?

Thank you,

Ed

Hi Delaney,

I sent the friend request.

Thanks,

Ed