TMS320F28388D: IPC Communication Method Between CM and CPU1 During Flash Operations in EtherCAT Communication-Based Code

Tool/software:

Hi

An issue occurred while developing the EtherCAT communication code.

The system is based on a dual-core architecture, with IPC communication established between CPU1 and Cortex-M4.

However, during flash memory operations, intermittent disruptions in IPC communication have been observed.

Based on the current analysis, it was found that the issue arises because the sendCommand function inside the while loop in the main routine of the Cortex-M4 file stops functioning, causing the communication to break.

Could you provide any insights into the possible causes of this issue?

void CM_init(void)
{
    //
    // Disable the watchdog
    //
    SysCtl_disableWatchdog();

#ifdef _FLASH
    //
    // Copy time critical code and flash setup code to RAM. This includes the
    // following functions: InitFlash();
    //
    // The RamfuncsLoadStart, RamfuncsLoadSize, and RamfuncsRunStart symbols
    // are created by the linker. Refer to the device .cmd file.
    //
    memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);

    //
    // Claim the Flash Pump Semaphore before initializing Flash
    //
    Flash_claimPumpSemaphore(FLASH_CM_WRAPPER);

    //
    // Call Flash Initialization to setup flash waitstates. This function must
    // reside in RAM.
    //
    Flash_initModule(FLASH0CTRL_BASE, FLASH0ECC_BASE, DEVICE_FLASH_WAITSTATES);

    //
    // Set Flash Bank and Pump power mode to Active
    //
    Flash_setBankPowerMode(FLASH0CTRL_BASE, FLASH_BANK, FLASH_BANK_PWR_ACTIVE);
    Flash_setPumpPowerMode(FLASH0CTRL_BASE, FLASH_PUMP_PWR_ACTIVE);

    //
    // Release the Flash Pump Semaphore after initialization
    //
    Flash_releasePumpSemaphore();

#endif

    //
    // Turn on all peripherals
    //
    CM_enableAllPeripherals();

    //
    // Sets the NVIC vector table offset address.
    //
#ifdef _FLASH
    Interrupt_setVectorTableOffset((uint32_t)vectorTableFlash);
#else
    Interrupt_setVectorTableOffset((uint32_t)vectorTableRAM);
#endif
    
}

#else
    HW_Init();
#endif
    MainInit();

    bRunApplication = TRUE;
    do

    {
        GPIO_setPortPins(GPIO_PORT_C, GPIO_GPCSET_GPIO93);
        
        IPC_Write(IPC_CM_L_CPU1_R, IPC_FLAG2, IPC_CMD_READ_MEM1, 6);
        
        GPIO_clearPortPins(GPIO_PORT_C, GPIO_GPCCLEAR_GPIO93);

        MainLoop();
        DEVICE_DELAY_US((uint32_t)(5.));
        BackTicker++;
        
    } while (bRunApplication == TRUE);

void main(void)
{
    //
    // Disable the watchdog
    //
    SysCtl_disableWatchdog();

#ifdef _FLASH
    //
    // Copy time critical code and flash setup code to RAM. This includes the
    // following functions: Flash_initModule();
    //
    // The RamfuncsLoadStart, RamfuncsLoadSize, and RamfuncsRunStart symbols
    // are created by the linker. Refer to the device .cmd file.
    //
    memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);

    //
    // Claim the Flash Pump Semaphore before initializing Flash
    //
    Flash_claimPumpSemaphore(FLASH_CPU1_WRAPPER);

    //
    // Call Flash Initialization to setup flash waitstates. This function must
    // reside in RAM.
    //
    Flash_initModule(FLASH0CTRL_BASE, FLASH0ECC_BASE, DEVICE_FLASH_WAITSTATES);

    //
    // Set Flash Bank and Pump power mode to Active
    //
    Flash_setBankPowerMode(FLASH0CTRL_BASE, FLASH_BANK, FLASH_BANK_PWR_ACTIVE);
    Flash_setPumpPowerMode(FLASH0CTRL_BASE, FLASH_PUMP_PWR_ACTIVE);

    //
    // Release the Flash Pump Semaphore after initialization
    //
    Flash_releasePumpSemaphore();

#endif