This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28377D: Communication Issues Between Two DSPs via SCI using CPU2 core

Part Number: TMS320F28377D
Other Parts Discussed in Thread: C2000WARE

Tool/software:

The two 28377D devices communicate via serial ports.

The communication parameters are configured as follows: The baud rate is set to 115200, the RX FIFO is configured to 8 bits, and the communication is performed using an interrupt-based method.

The transmitter sends 8 bytes each time.When the first frame of 8 data bytes is received, the operation is normal.Starting from the second transmission, data offset errors will occur during reception.

The serial port configuration is as follows::

void InitSciBFIFO()
{

//    ScibRegs.SCICCR.all = 0x0007;                           // 1 stop bit,  No loopback
//                                                            // No parity,8 char bits,
//                                                            // async mode, idle-line protocol

    ScibRegs.SCICCR.all = 0x0087;                           // 1 stop bit,  No loopback
                                                            // No parity,8 char bits,
                                                            // async mode, idle-line protocol

    ScibRegs.SCICTL1.all = 0x0003;                          // enable TX, RX, internal SCICLK,
                                                            // Disable RX ERR, SLEEP, TXWAKE
    ScibRegs.SCICTL2.all = 0x0003;

    //ScibRegs.SCICTL2.bit.TXINTENA = 0;
    ScibRegs.SCICTL2.bit.RXBKINTENA = 1;                    //Enable SCIB _RX

//
//  SCIA at 9600 baud
//  @LSPCLK = 50 MHz (200 MHz SYSCLK) HBAUD = 0x02 and LBAUD = 0x8B.
//  @LSPCLK = 30 MHz (120 MHz SYSCLK) HBAUD = 0x01 and LBAUD = 0x86.
//  @LSPCLK = 25 MHz (100 MHz SYSCLK) HBAUD = 0x01 and LBAUD = 0x45.

    ScibRegs.SCIHBAUD.all = 0x0000;                     // @LSPCLK = 50 MHz  115200
    ScibRegs.SCILBAUD.all = 0x0036;

//    ScibRegs.SCIHBAUD.all = 0x0000;                     // @LSPCLK = 50 MHz  1M
//    ScibRegs.SCILBAUD.all = 0x0006;

    ScibRegs.SCIFFTX.bit.TXFIFORESET = 0;
    ScibRegs.SCIFFRX.bit.RXFIFORESET = 0;

    ScibRegs.SCICTL1.all = 0x0023;                      // Relinquish SCI from Reset

//  Enable SCIFIFO
    ScibRegs.SCIFFTX.all = 0xF040;                      //Disable FIFO Using 4 Enable FIFO Using 6

    ScibRegs.SCIFFRX.all = 0x2068;                      //FIFO interupter level 8    interrupter level == 5
    ScibRegs.SCIFFCT.all = 0x0;

    ScibRegs.SCIFFTX.bit.TXFFINTCLR = 1;    //Avoid PowerUp DataTX
    ScibRegs.SCIFFTX.bit.TXFFIENA = 0;      //Avoid PowerUp DataTX

}

The interrupt processing

__interrupt void ScibRxfifo_isr(void)
{

    volatile static Uint32 ScibInteruptimes = 0;

    ScibInteruptimes++;

    if (SCIB_Recdata.uStatus != FINISH)
    {
        while(ScibRegs.SCIFFRX.bit.RXFFST)
        {
            SCIB_Recdata.uData[SCIB_Recdata.uIndex++] = ScibRegs.SCIRXBUF.all&0xff;
        }
        //update sci recevie status and set interrupt interval.
        SCIB_Recdata.uStatus = WORKING;
        SCIB_Recdata.ticker = SCIB_Recdata.spacetime;
    }



    ScibRegs.SCIFFRX.bit.RXFFOVRCLR = 1;                                    // Clear Overflow flag
    ScibRegs.SCIFFRX.bit.RXFFINTCLR = 1;                                    // Clear Interrupt flag

    ScibRegs.SCIFFRX.bit.RXFIFORESET = 1;

    // Issue PIE ack
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;                                 // Issue PIE ACK PIEACK_GROUP9
}

The specific example is as follows:

When I send  0x01 0x47 0x6A 0x00 0x00 0x00 0x00 0x55

The observation is made in the interrupt function of the receiver.

The recive data is   0x00 0x55 0x01 0x47 0x6A 0x00 0x00 0x00 

The above configuration has been applied to the project of communication between the DSP and ARM, and there are no issues during the communication process. However, while debugging the communication between two DSPs, Do you have any suggestions for solving this issue?