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TMS320F28388D: CMPSS, ASYNCHEN & ASYNCLEN feature

ADRIEN CREUSVAUX
Intellectual 310 points
Part Number: TMS320F28388D
Other Parts Discussed in Thread: C2000WARE

Tool/software:

Hi,

I have a current sensor that is offseted and it feeds into A2/CMPIN1P.

I am configuring CMPSS1 module to protect my application from overcurrent on both positive and negative side using internal DAC and latched output of digital filter (High & Low, output of COMPL is inverted) and then to trip PWM Module when the default occurs.

I configured CTRIPHSEL & CTRIPLSEL = 3 => latched output of digital filter drives CTRIPH and CTRIPL.

Regarding ASYNCHEN and ASYNCLEN, if I configure them to 1, it means that "Asynchronous comparator output feeds into OR gate with latched digital output filter output". 

In this case, as it's an OR gate, the asynchronous path will always acts before the digital output filter so the digital output filter is useless no ? I'm not sure to understand the purpose of these bit ASYNCHEN & ASYNCLEN from COMPCTL register ?

Thanks for clarifying this point, I would like to be sure that I have a complete understanding of how it works.

Regards,

Adrien

  • 0
    TI__Expert 5270 points

    Hello,

    I will check and reply in timely manner.

  • +1 in reply to Stevan Duraskovic
    TI__Mastermind 20151 points

    Hi Adrien,

    When you use the latched CMPSS output, the default behavior is to use the synchronized output with the digital filter, so your CMPSS output is delayed by a few clock cycles since it needs to be synchronized. The purpose of the ASYNCHEN is so that you can ensure the CMPSS output happens as soon as possible with the asynchronous output while also utilizing the latched output (which can be cleared by software or by the PWMSYNC event). So yes the synchronizer plus the digital filter are not really used in this case, but the latch is used to maintain the high output even if the input to the CMPSS falls below your DAC threshold

    Regards,

    Peter

  • 0 in reply to Peter Luong
    Intellectual 310 points

    Hi Peter,

    Understood, that's perfectly clear!

    Thanks for you support,

    Adrien

  • 0
    Guru 56143 points
    ADRIEN CREUSVAUX said:
    In this case, as it's an OR gate, the asynchronous path will always acts before the digital output filter so the digital output filter is useless no ? I'm not sure to understand the purpose of these bit ASYNCHEN & ASYNCLEN from COMPCTL register ?

    Recently reported forum post C2000Ware incorrectly enables the ASNYC path with digital filter on CTRIP_H/L MUX into ePWM DC_H/L. The work around fix DAC_H/L DC filter enable calls are shown in the posted code. Poor excuse to override the DC filter with Async path as filter can be tweaked to control effectiveness to reduce noise on the input wire. The Async path will always override the filter no matter how SYNC is configured.