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TMS320F28P650DK: MCAN question

Joyce Gao
Expert 3150 points
Part Number: TMS320F28P650DK


Tool/software:

Hi expert,

At present, we have encountered a technical detail problem when using MCAN: mainly because we used DCAN originally. DCAN has 32 mailboxes. When the mailboxes are configured to receive, the bit mask filtering mechanism can be used. However, MCAN only has fifo0 and 1 that can use the bit mask mechanism. Although the length of fifo can reach 64, there is no flag bit to show which element refreshes the data. In this way, we need to query the id to match the data and change the underlying program logic. I don’t know if our understanding is correct, or whether the RX buff can also be configured as a bit mask filtering mechanism. We can use the newdata bit to determine which element has new data.

Thanks

Joyce

  • 0
    TI__Mastermind 24603 points

    Hello Joyce,

    The correct statement is that MCAN supports the bit mask mechanism for the Rx Buffer, or one of the two RX FIFOs. So, the RX Buff can be configured for bit mask filtering. However, there is also the MCAN_IR.RF[0:1]N (RX FIFO[0:1] New Message) flag that could be used I also wanted to point on the following note from the TRM chapter:

    When an accepted message is written to one of the two Rx FIFOs, or into an Rx Buffer, the unmodified received identifier is stored independent of the filters used. The result of the acceptance filter process is strongly depending on the sequence of configured filter elements.

    With this in mind the application could:

    1) Configure the filter element match action to "Set High Priority Message interrupt flag MCAN_IR.HPM and store received frame in FIFO 0 or FIFO 1"

    2) Upon receiving an accepted message, the MCAN_HPMS register contains details on:

    1. FLST: Which filter list was matched (STD/XTD)
    2. FIDX: The Filter Index (which will be equivalent to the ID of the matched message)
    3. MSI: Where the message was stored (Buffer/NoFIFO, FIFO MSG Lost, MSG stored in FIFO0, or MSG stored in FIFO1)
    4. BIDX: Buffer index of the FIFO it was stored in (if applicable).

    3) This gives application insight into the matched id and FIFO data location to determine necessary program logic changes.

    Utilizing the RX Buffer with single ID filtering and NDAT registers is also acceptable.

    Best Regards,

    Zackary Fleenor