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TMS320F28388D: How to Select "MUX Position" > 3 when MUX Register Bit Fields have only 2 Bits?

78Sys
Expert 1540 points

Part Number: TMS320F28388D

Tool/software:

How do you select a MUX Position with number > 3 when the MUX registers have only 2 bits for each GPIO allowing only 0 - 3 to be selected.

For example, from Table 6-1 of the TMS320F28388D data sheet, how do I select the EPWM9A function for the GPIO16 pin?

Table 6-1 states that the "MUX Position" is 5, but the GPAMUX2 Register through which the EPWM9A function is selected for the GPIO16 pin is only 2 bits wide, which allows a selection of only 0 - 3.

How is the EPWM9A function with a "MUX Position" of 5 (101) selected for the GPIO16 pin in this GPAMUX2 Register with only 2 bits for the field, which allows only 0 - 3?

  • +1
    Expert 1540 points

    Use GPAMUX1 for the lower 2 bits and GPAMUX2 for the upper 2 bits, and may have to "unlock" GPAMUX2 by writing 0x0000 to GPALOCK and 0x0001 to GPACR.

    Ditto for GPBMUX1, GPCMUX1,etc. Of course, Texas Instruments does not explain this anywhere in the Technical Reference Manual, the data sheet, or anywhere else.

  • 0
    Expert 1540 points

    Use GPAMUX1 for the lower 2 bits and GPAMUX2 for the upper 2 bits, and may have to "unlock" GPAMUX2 by writing 0x0000 to GPALOCK and 0x0001 to GPACR.

    Ditto for GPBMUX1, GPCMUX1,etc. Of course, Texas Instruments does not explain this anywhere in the Technical Reference Manual, the data sheet, or anywhere else.

  • 0
    Expert 1540 points

    Correction -- the upper 2 bits corresponding to GPAMUX1's lower 2 bits are set in GPAGMUX1. In general, GPxMUXy is the 2 lower bits, and GPxGMUXy is the 2 upper bits. GPxGMUXy does not have to be set if only the lower 2 bits (0 - 3) for the MUX position are needed (GPxMUXy), since the GPxGMUXy register bits default to 0.

  • 0
    Expert 1540 points

    Correction -- the upper 2 bits corresponding to GPAMUX1's lower 2 bits are set in GPAGMUX1. In general, GPxMUXy is the 2 lower bits, and GPxGMUXy is the 2 upper bits. GPxGMUXy does not have to be set if only the lower 2 bits (0 - 3) for the MUX position are needed (GPxMUXy), since the GPxGMUXy register bits default to 0.