Other Parts Discussed in Thread: C2000WARE, SYSCONFIG
Tool/software:
The TI PinMux tool generates pinmux.c and header files. pinmux,c includes driverlib.h. When I build, driverlib.h is not found.
I'm using the f2837xs processor so I added this to my include path.
C:\ti\c2000\C2000Ware_5_04_00_00\driverlib\f2837xs\driverlib\
This resolved the initial header not found, but yet another was not found. I added
C:\ti\c2000\C2000Ware_5_04_00_00\device_support\f2837xs\common\include
to resolve the next one. This worked.
My problem now though is that this has created a conflict with a header we've defined in our project; version.h. Version.h is also in the C2000Ware folders. The one from the C2000Ware folders is being found first. If I change the order of the include files, different issues happen because the local version of version.h used by driverlib.h or some header included by driverlib.h
1. Whats the correct way to configure CCS such that "driverlib.h" is found when I include pinmux.c?
I'm using CCS v12.
Thanks,
Paul Hetherington
from pinmux.c
//*****************************************************************************
//
// pinmux.c - Function to write the generated pin mux values to the appropriate
// registers.
// Created using TI Pinmux 4.0.1543 on 3/7/2025 at 10:21:41 AM.
//
//*****************************************************************************
//
// Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
/
.
.
.
//*****************************************************************************
//
// NOTE!! This file uses driverlib register macros from C2000Ware.
// This function is provided for your convenience and to serve as an example
// of the use of the generated header file, but its use is not required.
//
// To download C2000Ware: www.ti.com/.../C2000Ware
//
//*****************************************************************************
#include "driverlib.h"
#include "pinmux.h"
//*****************************************************************************
//
// Configures the pin mux registers, using the generated register values.
//
// This function writes the values generated by the pin mux tool to their
// corresponding GPIO control registers. These generated values should be found
// in the generated "pinmux.h."
//
//*****************************************************************************
void
GPIO_setPinMuxConfig(void)
{
uint32_t lockValA;
uint32_t lockValB;
uint32_t lockValC;
uint32_t lockValD;
uint32_t lockValE;
uint32_t lockValF;
EALLOW;
//
// Save the current value of the GPIO lock registers
//
lockValA = HWREG(GPIOCTRL_BASE + GPIO_O_GPALOCK);
lockValB = HWREG(GPIOCTRL_BASE + GPIO_O_GPBLOCK);
lockValC = HWREG(GPIOCTRL_BASE + GPIO_O_GPCLOCK);
lockValD = HWREG(GPIOCTRL_BASE + GPIO_O_GPDLOCK);
lockValE = HWREG(GPIOCTRL_BASE + GPIO_O_GPELOCK);
lockValF = HWREG(GPIOCTRL_BASE + GPIO_O_GPFLOCK);
//
// Unlock the GPIO control registers
//
HWREG(GPIOCTRL_BASE + GPIO_O_GPALOCK) = 0x00000000;
HWREG(GPIOCTRL_BASE + GPIO_O_GPBLOCK) = 0x00000000;
HWREG(GPIOCTRL_BASE + GPIO_O_GPCLOCK) = 0x00000000;
HWREG(GPIOCTRL_BASE + GPIO_O_GPDLOCK) = 0x00000000;
HWREG(GPIOCTRL_BASE + GPIO_O_GPELOCK) = 0x00000000;
HWREG(GPIOCTRL_BASE + GPIO_O_GPFLOCK) = 0x00000000;
//
// Clear the mux register fields that are about to be changed
//
HWREG(GPIOCTRL_BASE + GPIO_O_GPAGMUX1) &= ~GPAMUX1_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPAGMUX2) &= ~GPAMUX2_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPAMUX1) &= ~GPAMUX1_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPAMUX2) &= ~GPAMUX2_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPBGMUX1) &= ~GPBMUX1_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPBGMUX2) &= ~GPBMUX2_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPBMUX1) &= ~GPBMUX1_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPBMUX2) &= ~GPBMUX2_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPCGMUX1) &= ~GPCMUX1_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPCGMUX2) &= ~GPCMUX2_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPCMUX1) &= ~GPCMUX1_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPCMUX2) &= ~GPCMUX2_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPDGMUX1) &= ~GPDMUX1_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPDGMUX2) &= ~GPDMUX2_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPDMUX1) &= ~GPDMUX1_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPDMUX2) &= ~GPDMUX2_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPEGMUX1) &= ~GPEMUX1_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPEGMUX2) &= ~GPEMUX2_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPEMUX1) &= ~GPEMUX1_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPEMUX2) &= ~GPEMUX2_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPFGMUX1) &= ~GPFMUX1_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPFMUX1) &= ~GPFMUX1_MASK;
//
// Write pin muxing to mux registers
//
HWREG(GPIOCTRL_BASE + GPIO_O_GPAGMUX1) |= GPAGMUX1_VALUE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPAGMUX2) |= GPAGMUX2_VALUE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPAMUX1) |= GPAMUX1_VALUE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPAMUX2) |= GPAMUX2_VALUE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPBGMUX1) |= GPBGMUX1_VALUE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPBGMUX2) |= GPBGMUX2_VALUE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPBMUX1) |= GPBMUX1_VALUE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPBMUX2) |= GPBMUX2_VALUE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPCGMUX1) |= GPCGMUX1_VALUE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPCGMUX2) |= GPCGMUX2_VALUE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPCMUX1) |= GPCMUX1_VALUE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPCMUX2) |= GPCMUX2_VALUE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPDGMUX1) |= GPDGMUX1_VALUE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPDGMUX2) |= GPDGMUX2_VALUE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPDMUX1) |= GPDMUX1_VALUE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPDMUX2) |= GPDMUX2_VALUE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPEGMUX1) |= GPEGMUX1_VALUE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPEGMUX2) |= GPEGMUX2_VALUE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPEMUX1) |= GPEMUX1_VALUE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPEMUX2) |= GPEMUX2_VALUE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPFGMUX1) |= GPFGMUX1_VALUE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPFMUX1) |= GPFMUX1_VALUE;
//
// Write pin analog mode select to registers
//
HWREG(GPIOCTRL_BASE + GPIO_O_GPBAMSEL) &= ~GPBAMSEL_MASK;
HWREG(GPIOCTRL_BASE + GPIO_O_GPBAMSEL) |= GPBAMSEL_VALUE;
//
// Restore GPIO lock register values
//
HWREG(GPIOCTRL_BASE + GPIO_O_GPALOCK) = lockValA;
HWREG(GPIOCTRL_BASE + GPIO_O_GPBLOCK) = lockValB;
HWREG(GPIOCTRL_BASE + GPIO_O_GPCLOCK) = lockValC;
HWREG(GPIOCTRL_BASE + GPIO_O_GPDLOCK) = lockValD;
HWREG(GPIOCTRL_BASE + GPIO_O_GPELOCK) = lockValE;
HWREG(GPIOCTRL_BASE + GPIO_O_GPFLOCK) = lockValF;
EDIS;
}
