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F28335 PF pipeline protected against direct memory operations?



Hello,

I have a piece of code that copies BITNO bit from BITVAL location to ADDR location:

    MOV      ACC, @@BITVAL                     ; load the source location
    AND      ACC, #(1 << BITNO)                ; extract source bit
    MOVL    XAR0, #(ADDR)                        ; address of the target location
    AND      *, #(~(1 << BITNO))                  ; clear target bit
    OR        *, ACC                                         ; OR target bit with source bit

BITVAL is allways in L0 SARAM and BITNO can be between 0 for LSB and 15 for MSB. If ADDR is also in L0 SARAM everything works fine, but if ADDR is in Peripheral Frame 1 (e.g. GPBDAT) than the target bit isn't same as source bit. If I single step the code, all executes fine. I tried inserting (seven) NOPs after AND and after OR instructions, and in this case everything is OK also.

I thought that this might be caused by pipeline conflict so I checked Device Emulation Registers values. They are all at their default values, i.e. PFs are pipeline protected.

Can anyone explain this behaviour? Appreciate any help,

Josip