Other Parts Discussed in Thread: C2000WARE
Tool/software:
Hi,
I'm using the following linker file and I have a problem with it, the problem is that I get memory violation at 0x63FF address, I don't touch this memory in my code but I get this violation,
I want to know what is the reason ? Because sometimes my code works unpredictable and I guess that could be a reason for that.
.cmd file:
#ifdef CLA_BLOCK_INCLUDED
// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are.
CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start
#endif //CLA_BLOCK_INCLUDED
MEMORY
{
PAGE 0 :
/* BEGIN is used for the "boot to SARAM" bootloader mode */
BEGIN : origin = 0x000000, length = 0x000002
BEGIN_FLASH : origin = 0x080000, length = 0x000002
RAMLS_CLA_DATA : origin = 0x008000, length = 0x002000
RAMLS_CLA_PROG : origin = 0x00A000, length = 0x002000
RAMGS_PROG : origin = 0x014000, length = 0x007000
/* Flash sectors */
FLASHA_N : origin = 0x080002, length = 0x03FFFE /* on-chip Flash */
RESET : origin = 0x3FFFC0, length = 0x000002
PAGE 1 :
BOOT_RSVD : origin = 0x000002, length = 0x0001AE /* Part of M0, BOOT rom will use this for stack */
RAMM0M1 : origin = 0x0001B0, length = 0x000650
RAMD0D1 : origin = 0x00C000, length = 0x001000
RAMGS_DATA : origin = 0x010000, length = 0x004000
CLA1_MSGRAMLOW : origin = 0x001480, length = 0x000080
CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080
CPU1TOCPU2RAM : origin = 0x03A000, length = 0x000800
CPU2TOCPU1RAM : origin = 0x03B000, length = 0x000800
CPUTOCMRAM : origin = 0x039000, length = 0x000800
CMTOCPURAM : origin = 0x038000, length = 0x000800
CANA_MSG_RAM : origin = 0x049000, length = 0x000800
CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
#ifdef EMIF1_CS0_INCLUDED
EMIF1_CS0_MEMORY : origin = 0x80000000, length = 0x10000000
#endif //EMIF1_CS0_INCLUDED
#ifdef EMIF1_CS2_INCLUDED
EMIF1_CS2_MEMORY : origin = 0x00100000, length = 0x00200000
#endif //EMIF1_CS2_INCLUDED
#ifdef EMIF1_CS3_INCLUDED
EMIF1_CS3_MEMORY : origin = 0x00300000, length = 0x00080000
#endif //EMIF1_CS3_INCLUDED
#ifdef EMIF1_CS4_INCLUDED
EMIF1_CS4_MEMORY : origin = 0x00380000, length = 0x00060000
#endif //EMIF1_CS4_INCLUDED
#ifdef EMIF2_CS0_INCLUDED
EMIF2_CS0_MEMORY : origin = 0x90000000, length = 0x10000000
#endif //EMIF2_CS0_INCLUDED
#ifdef EMIF2_CS2_INCLUDED
EMIF2_CS2_MEMORY : origin = 0x00002000, length = 0x00001000
#endif //EMIF2_CS2_INCLUDED
}
SECTIONS
{
/* Allocate program areas: */
codestart : > BEGIN_FLASH, PAGE = 0, ALIGN(8)
.text : > FLASHA_N, PAGE = 0, ALIGN(8)
.cinit : > FLASHA_N, PAGE = 0, ALIGN(8)
.switch : > FLASHA_N, PAGE = 0, ALIGN(8)
#if defined(__TI_EABI__)
.init_array : > FLASHA_N, PAGE = 0, ALIGN(8)
/* Initalized sections go in Flash */
.const : > FLASHA_N, PAGE = 0, ALIGN(8)
.data : > RAMGS_DATA, PAGE = 1
.TI.ramfunc : {} LOAD = FLASHA_N,
RUN = RAMGS_PROG,
LOAD_START(RamfuncsLoadStart),
LOAD_SIZE(RamfuncsLoadSize),
LOAD_END(RamfuncsLoadEnd),
RUN_START(RamfuncsRunStart),
RUN_SIZE(RamfuncsRunSize),
RUN_END(RamfuncsRunEnd),
PAGE = 0, ALIGN(8)
ramfuncs : LOAD = FLASHA_N,
RUN = RAMGS_PROG,
LOAD_START(MW_RamfuncsLoadStart),
LOAD_SIZE(MW_RamfuncsLoadSize),
LOAD_END(MW_RamfuncsLoadEnd),
RUN_START(MW_RamfuncsRunStart),
RUN_SIZE(MW_RamfuncsRunSize),
RUN_END(MW_RamfuncsRunEnd),
PAGE = 0, ALIGN(8)
#else
.pinit : > FLASHA_N, PAGE = 0, ALIGN(8)
/* Initalized sections go in Flash */
.econst : > FLASHA_N, PAGE = 0, ALIGN(8)
.TI.ramfunc : {} LOAD = FLASHA_N,
RUN = RAMGS_PROG,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(8)
ramfuncs : LOAD = FLASHA_N,
RUN = RAMGS_PROG,
LOAD_START(_MW_RamfuncsLoadStart),
LOAD_SIZE(_MW_RamfuncsLoadSize),
LOAD_END(_MW_RamfuncsLoadEnd),
RUN_START(_MW_RamfuncsRunStart),
RUN_SIZE(_MW_RamfuncsRunSize),
RUN_END(_MW_RamfuncsRunEnd),
PAGE = 0, ALIGN(8)
#endif // defined(__TI_EABI__)
#if defined(__TI_EABI__)
.bss : >> RAMGS_DATA , PAGE = 1
#else
.ebss : >> RAMGS_DATA , PAGE = 1
#endif // defined(__TI_EABI__)
/* Allocate IQmath areas: */
IQmath : > FLASHA_N, PAGE = 0, ALIGN(8) /* Math Code */
IQmathTables : > FLASHA_N, PAGE = 0, ALIGN(8)
#if defined(__TI_EABI__)
.sysmem : > RAMD0D1, PAGE = 1
#else
.esysmem : > RAMD0D1, PAGE = 1
.cio : > RAMGS_DATA, PAGE = 1
#endif // defined(__TI_EABI__)
.stack : > RAMM0M1, PAGE = 1
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
MSGRAM_CPU1_TO_CPU2 : > CPU1TOCPU2RAM, PAGE = 1, ALIGN(4), TYPE = NOINIT
MSGRAM_CPU2_TO_CPU1 : > CPU2TOCPU1RAM, PAGE = 1, ALIGN(4), TYPE = NOINIT
MSGRAM_CPU_TO_CM : > CPUTOCMRAM, PAGE = 1, ALIGN(4), TYPE = NOINIT
MSGRAM_CM_TO_CPU : > CMTOCPURAM, PAGE = 1, ALIGN(4), TYPE = NOINIT
#if defined(EMIF1_CS0_INCLUDED) && defined(EMIF2_CS0_INCLUDED)
.farbss : > EMIF1_CS0_MEMORY | EMIF2_CS0_MEMORY, PAGE = 1
.farconst : > EMIF1_CS0_MEMORY | EMIF2_CS0_MEMORY, PAGE = 1
#elif !defined(EMIF1_CS0_INCLUDED) && defined(EMIF2_CS0_INCLUDED)
.farbss : > EMIF2_CS0_MEMORY, PAGE = 1
.farconst : > EMIF2_CS0_MEMORY, PAGE = 1
#elif defined(EMIF1_CS0_INCLUDED) && !defined(EMIF2_CS0_INCLUDED)
.farbss : > EMIF1_CS0_MEMORY, PAGE = 1
.farconst : > EMIF1_CS0_MEMORY, PAGE = 1
#else
//No EMIF memory sections
#endif //defined(EMIF1_CS0_INCLUDED) && defined(EMIF2_CS0_INCLUDED)
#ifdef EMIF1_CS0_INCLUDED
Em1Cs0 : > EMIF1_CS0_MEMORY, PAGE = 1
#endif //EMIF1_CS0_INCLUDED
#ifdef EMIF2_CS0_INCLUDED
Em2Cs0 : > EMIF2_CS0_MEMORY, PAGE = 1
#endif //EMIF2_CS0_INCLUDED
#ifdef EMIF1_CS2_INCLUDED
Em1Cs2 : > EMIF1_CS2_MEMORY, PAGE = 1
#endif //EMIF1_CS2_INCLUDED
#ifdef EMIF1_CS3_INCLUDED
Em1Cs3 : > EMIF1_CS3_MEMORY, PAGE = 1
#endif //EMIF1_CS3_INCLUDED
#ifdef EMIF1_CS4_INCLUDED
Em1Cs4 : > EMIF1_CS4_MEMORY, PAGE = 1
#endif //EMIF1_CS4_INCLUDED
#ifdef MW_EMIF2_CS2_INCLUDED
Em2Cs2 : > EMIF2_CS2_MEMORY, PAGE = 1
#endif //MW_EMIF2_CS2_INCLUDED
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
