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TMS320F28384S: Configuration of the TBPHSHRLOADE bit when using high-resolution period control and phase control at the same time

Part Number: TMS320F28384S


Tool/software:

Hello,

I have a question regarding HRPWM. Our application requires high-resolution period control, phase control and dead-times at the same time, thus we are using up-down counting mode.

The TRM section on the initialization of HR period control states that the HRPCTL.TBPHSHRLOADE bit must always be set when operating in up-down mode. With regard to HR phase control, several threads here describe that in this case the TRREM register must be used for the HR part of the phase instead of the TBPHSHR register.

However, when trying out the hrpwm_ex4_deadband_sfo_v8 example, I noticed some contradictory things.

1) Firstly, the HRPCTL.TBPHSHRLOADE bit is never set in the example, although HR period control is used in up-down mode. Why is this done? Does the bit not have to be set in every case?

2) If the HRPCTL.TBPHSHRLOADE bit is set, then the HR phase in the TRREM register no longer has any impact. However, loading the phase into the TBPHSHR register then works, which according to forum posts, is not actually supported when high-resolution period control and phase control is being used.

In summary, two configurations seem to work:

a) HRPCTL.TBPHSHRLOADE = 0 and use TRREM for the HR phase

b) HRPCTL.TBPHSHRLOADE = 1 and use TBPHSHR for the HR phase

As far as I understand it, both configurations are not correct. Could you please explain to me how these contradictions come about and which configuration should be used?

Best regards,

Christian

  • Christian,

    1. HRPCTL.TBPHSHRLOADE only need to set when multiple ePWM need to be in sync. It is not needed in standalone operation.

    2. TRREM is HRPWM Remainder Bits: This 11-bit value keeps track of the remainder portion of the HRPWM algorithm calculations. This value keeps track of the remainder portion of the HRPWM hardware calculations.

    Regards,

    Sumit