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TMS320F280039C: Read TBCTR

Fengyu Leng
Intellectual 2050 points
Part Number: TMS320F280039C


Tool/software:

Hi Champ,

My customer use F280039 epwm, but have timing issue. We are trying to do some test to find the root cause. 

Below is the test code, it runs in 10us timer ISR and TBCTR keep counting. After we update TBCTL, TBPRD, TBCTR to 0, we read TBCTR register, but get different value when times of the ISR are different. Sometimes,  TBCTR=0x0008, I think it is normal. But we can also get TBCTR =0xFFF8, it means we don't load TBCTR=0 successfully? Hope to get your comments on this.Thanks!

z

BR,

Fengyu

  • 0
    TI__Mastermind 25850 points

    Hi Fengyu,

    Fengyu Leng said:
    My customer use F280039 epwm, but have timing issue.

    What is the timing issue that the customer is facing?

    Fengyu Leng said:
    Sometimes,  TBCTR=0x0008, I think it is normal. But we can also get TBCTR =0xFFF8, it means we don't load TBCTR=0 successfully? Hope to get your comments on this.

    Can you setup a breakpoint after the EDIS and check what the values in the registers are through CCS? I would like to see if this view matches what you are reading back. 

    Best Regards,
    Marlyn

  • 0 in reply to Marlyn Rosales Castaneda20
    TI__Intellectual 2050 points

    Hi Marlyn

    Thanks for your support.

    Even if I set a breakpoint after EDIS, the TBCTR can't stop counter. 

    Marlyn Rosales Castaneda20 said:
    Can you setup a breakpoint after the EDIS and check what the values in the registers are through CCS? I would like to see if this view matches what you are reading back. 

    I think below table show the reason. 

    Am I right? Do you have other test suggestion? 

    BR,

    Fengyu

  • 0 in reply to Fengyu Leng
    TI__Mastermind 25850 points

    Hi Fengyu,

    Thank you, you are correct. Can you please explain what the issue is? I may be able to provide a better test method for finding the root cause.

    The code that is part of the current test case would lead to undefined behavior. TBCTL is getting set to 0 which means that TBPRD value will only take affect when the TBCTR = 0 or a sync event occurs (PRDLD bit). The CTRMODE bit within TBCTL is 0 is up-count mode instead of 3 which freezes the counter and prevents it from running. You don't know what value is in the TBCTR register before all of these writes are happening. Ideally, you would freeze the counter, make the update to TBCTR, then unfreeze and read. However, TBPRD is also getting set to 0. Its unclear whether this will load immediately when TBCTR is changed or if it needs at least a cycle. We don't categorize the behavior of the EPWM when the TBPRD is set to 0. 

    Best Regards,

    Marlyn