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TMS320F28377D: Position of the edges generated by the Action-Qualifier submodule and size of the HRPWM inoperativity region.

Alberto Gaeta
Prodigy 50 points
Other Parts Discussed in Thread: TMS320F28377D

  1. Part Number: TMS320F28377D

Tool/software:

Hello,

while working with HRPWM on a TMS320F282377D mcu, I noticed some behaviours which made me doubt about what understood from the Technical Reference Manual (SPRUHM8I).

In particular, from figure 15-24 at page 1896, it seems that edges are generated by the Action-Qualifier submodule immediately after TBCTR up counts from CMPx to CMPx+1 or immediately after it down counts from CMPx to CMPx-1, like if the Action-Qualifier output signals were latched and not resulting from the continuous comparison of TBCTR with CMPx.

This seems in contrast with the description given in subsections "15.5.1 Purpose of the Counter-Compare Submodule" at page 1882, where it is written that "The counter-compare submodule takes as input the time-base counter value. This value is continuously compared to the counter-compare A (CMPA) counter-compare B (CMPB) counter-compare C (CMPC) and counter-compare D (CMPD ) registers. When the time-base counter is equal to one of the compare registers, the counter-compare unit generates an appropriate event."

So it would seem that a match event is generated immediately after TBCTR up counts from CMPx-1 to CMPx or immediately after down counts from CMPx+1 to CMPx as a consequence of the continuous comparison.

Additionally, from subsection "15.14.1.5.3 Duty Cycle Range Limitation" at page 1962, it seems that HRPWM is forcibly disabled only during the first three EPWMCLK periods of every timebase period when high resolution period control is not used.

During my tests and for the sake of simplicity, I have configured EPWM1 as follows:

    - up-count direction only (TBCTR.CTRMODE = 0b00);
    - overall timebase prescaler ratio set to 1 (TBCTL.CLKDIV = TBCTL.HSPCLKDIV = 0xb000);
    - TBPRD = 99;
    - TBCTR == CMPA event used for generating an AQEPWM1A rising edge (AQCTLA.CAU = 0b10);
    - TBCTR == CMPB event used for generating an AQEPWM1A falling edge (AQCTLA.CBU = 0b01);
    - deadband submodule completely bypassed (DBCTL.OUT_MODE = 0b11);
    - high resolution period control disabled (HRPCTL.HRPE = 0);
    - high resolution deadbanding disabled (HRCNFG2.EDGMODEDB = 0b00);

TEST 1: 

When CMPB = 99, HRCNFG.EDGEMODE = 0b10 (hi-res positioning of AQEPWM1A falling edge) and CMPA=10, I can perform high resolution positioning of the AQEPWM1A falling edge (the one resulting from the TBCTR == CMPB event)  in the range 0 < CMPAHR <= (MEPscaleFactor-1) = 61. For greater CMPAHR values, the AQEPWM1A falling edge does not shift anymore.

This behaviour makes me believe that the AQEPWM1A falling edge is generated immediately after TBCTR up counts from 98 to 99 (CMPx-1 to CMPx transition) and not immediately after it is overflows from 99 to 0 (CMPx to CMPx+1 transition shown in figure 15-24) .
The fact that micro-positioning of the AQEPWM1A falling edge is not anymore possible for CMPAHR >= MEPscaleFactor = 62 is consistent with the fact that the HRPWM submodule is forcibly disabled by the encountering of the HRPWM inoperativity region of the successive PWM period while it is still delaying the AQEPWM1A falling edge.
As a result, the HRPWM submodule is suddenly bypassed and the AQEPWMiA signal is immediately output so generating a falling edge synchronized with the start of the successive PWM period/HRPWM inoperativity region no matter is CMPAHR >= MEPscaleFactor.

TEST 2: 

When CMPB = 90, HRCNFG.EDGEMODE = 0b01 (hi-res positioning of AQEPWM1A rising edge), CMPA = 0 or CMPA = 1, the AQEPWM1A rising edge cannot be micro-positioned whatever is the CMPAHR register value. This is consistent with the fact that, for such CMPA values, the resulting AQEPWM1A rising edges fall into the HRPWM inoperativity region.

TEST 3: 

When CMPA = 2, the AQEPWM1A rising edge can be again micro-positioned not only in the 0 < CMPAHR <= 61 range but also in the larger 0 < CMPAHR < 0xFE range.
However this behaviour should occur only for CMPA >= 3 if the HRPWM inoperativity region is three EPWMCLK periods large and if the rising edge resulting from the TBCTR == CMPA event is generated immediately after TBCTR up counts from CMPA-1 to CMPA as TEST 1 would suggest.

So here are my questions for you.

- if in up-count mode, edges are generated immediately after TBCTR up counts from CMPx to CMPx+1 as Figure 15-24 would suggest, how can you explain the results obtained from TEST 1?
In such case, the falling edge resulting from the TBCTR == CMPB == 99 event should not be micro-positionable because occurring exactly at the beginning of the HRPWM inoperativity region of the successive PWM period.

- if in up-count mode, edges are generated immediately after TBCTR up counts from CMPx-1 to CMPx as TEST 1 would suggest, how can you explain the results obtained from TEST 3?
  If the HRPWM inoperativity region is three EPWMCLK periods large, the first AQEPWM1A rising edge falling outside of it would be the one resulting from the TBCTR == CMPA == 3 event.

The only explanation for both TEST 1 and TEST 3 is that, in up-count mode, edges are generated when TBCTR up-counts from CMPx-1 to CMPx and the HRPWM inoperativity region is two (not three) EPWMCLK periods large.

Any alternative explanation would be very welcome.

Thank you very much for your support,

Best Regards,

Alberto

  • 0
    TI__Expert 4290 points

    Hello Alberto,

    Thank you for your question. I will take a look at TRM and do some research on this.

    Best regards,

    Stevan D.

  • 0 in reply to Stevan Duraskovic
    Prodigy 50 points

    Dear Stevan,

    Thank you very much for your help. I look forward to reading your reply.

    Best Regards,

    Alberto

  • 0 in reply to Alberto Gaeta
    TI__Expert 4290 points

    Hello Alberto,

    The Action-Qualifier submodule latches the compare events, generating output signals based on the state of the compare registers at the time of the event. it's essential to note that the Action-Qualifier submodule is designed to latch the compare events, which means that the output signals are generated based on the state of the compare registers at the time of the event. This latching mechanism allows for more precise control over the PWM output.

    A match event is generated immediately after TBCTR up counts from CMPx-1 to CMPx or down counts from CMPx+1 to CMPx, due to the continuous comparison performed by the counter-compare submodule.

    The duty cycle range limitation is applicable when high-resolution period control is not used, and the HRPWM module is forcibly disabled during the first three EPWMCLK periods of every timebase period.

  • 0 in reply to Stevan Duraskovic
    Prodigy 50 points

    Dear Stevan,

    thank you very much for your reply.

    I understand that the latches responsible for the generation of the Action-Qualifier's output signals are triggered by the events generated by the Counter-Compare submodule and so that an edge configured for occurrence at the TBCTR == CMPx event - with x = {A, B} - is generated by the Action-Qualifier submodule immediately after (just shifted by the propagation delays) the TBCTR register up counts from CMPx-1 to CMPx or immediately after the TBCTR register down counts from CMPx+1 to CMPx.

    Accordingly to the above understanding, when:

        - CMPA = 0;
        - CMPB = TBPRD;
        - the timebase counter is configured for up-counting;
        - the Action-Qualifier is configured for setting (high) the AQEPWMiA signal at the occurrence of the TBCTR == CMPA event;
        - the Action-Qualifier is configured for clearing (setting low) the AQEPWMiA signal at the occurrence of the TBCTR == CMPB event;

    the AQEPWM1A signal will remain low only during the TBCLK period while TBCTR == TBPRD.
    Is this correct? If yes, it explains the results of TEST 1.

    With regard to the duty cycle range limitation (which I called "HRPWM inoperativity region"), I understand that the HRPWM submodule is surely disabled during the first three EPWMCLK periods of every timebase period.

    So, in case the timebase prescaler ratio is set to 1 (TBCLK == EPWMCLK), this would mean that the HRPWM submodules will remain disabled in the time interval while TBCTR == 0, 1, 2.

    Considering both the above understandings, when:

         - CMPx = 2;
        - an edge is configured for occurrence at TBCTR == CMPx;
        - the timebase counter is configured for up-counting;

    an edge is generated when TBCTR up counts from 1 to 2 and such edge should not be micro-positionable/finely-delayable because occurring at the end of the second TBCLK/EPWMCLK period from the start of the timebase period. The first micro-positionable edge should be the one generated when CMPx = 3.


    However, in TEST 3, the edge generated when CMPx = 2 resulted to be micro-positionable. So, how is it possible to explain the results I got in TEST 3?
     
    I apologize for my excessive precision, but I need to figure out which CMPx values will allow to obtain micro-positionable edges and which do not.


    And it is also important for me to know if the behaviors I noticed during my tests are normal or if they are a consequence of the particular
    configuration used for the tests or if they are due to a mistake of mine.

    Thank you for your support and patience,

    Best Regards,

    Alberto
     

  • 0 in reply to Alberto Gaeta
    TI__Expert 4290 points

    Hello Alberto,

    Alberto Gaeta said:
    the AQEPWM1A signal will remain low only during the TBCLK period while TBCTR == TBPRD.
    Is this correct? If yes, it explains the results of TEST 1.

    Yes, your understanding is correct here. 

    Alberto Gaeta said:
    The first micro-positionable edge should be the one generated when CMPx = 3.

    Yes, the first micro-positionable edge should indeed be the one generated when CMPx = 3.

    Alberto Gaeta said:
    However, in TEST 3, the edge generated when CMPx = 2 resulted to be micro-positionable. So, how is it possible to explain the results I got in TEST 3?

    Although the HRPWM submodule is disabled during the first three EPWMCLK periods of every timebase period, the Action-Qualifier is enabled during this time.

    When CMPx = 2 is still micro-positionable, which suggests that there might be some internal mechanism that allows for micro-positioning of edges even when the HRPWM submodule is not fully enable. I'm not entirely sure why this is the case, and it's possible that this behavior is specific to the particular configuration used in your tests.