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F29H850TU: How to nest the same interrupt (e.g., INT_TIMER0) in the C29 core architecture?

Beat Arnet
Intellectual 890 points

Part Number: F29H850TU

Tool/software:

Hello TI Experts,

I'm working with the F29H850TU, and I have a specific question about interrupt nesting capabilities.

With the C28 core and PIE, it was possible to nest the same interrupt by simply re-enabling interrupts within the ISR (using EINT), and then disabling interrupts again (DINT) before exiting the ISR.

I've tried to implement similar functionality with the C29 core, but have found that same-interrupt nesting doesn't seem to work. I've tested this with both with a regular INT priority and a RTINT priority.

Specifically, I'm trying to nest the same timer interrupt (INT_TIMER0) within itself. For example, if INT_TIMER0 triggers and while servicing it another INT_TIMER0 event occurs, I want that second instance to be processed before completing the first one (up to a certain finite number of nesting, of course).

My questions are:

  1. Is nesting the same interrupt (like INT_TIMER0) possible at all with the C29 core?
  2. If possible, does the configuration differ between regular INTs and RTINTs?
  3. What specific PIPE configuration is required to enable this functionality?
  4. Are there any hardware limitations or caveats when attempting to nest the same interrupt?

I've reviewed the C29x Academy materials and TRM on the PIPE module, but couldn't find specific information about nesting the same interrupt instance.

Thank you for your assistance.
Beat

  • +1
    TI__Mastermind 21495 points

    Hi Beat,

    In general, please refer to the interrupt_ex2_int_rtint_nesting SW example in the F29x SDK for how interrupt nesting is implemented such as details on how ENINT is used to enable nesting in INT (RTINT cannot be disabled). I've linked the GitHub here as this example was modified slightly from the first release. 

    However, in terms of your questions regarding nesting the same interrupt, the PIPE is designed in a way that prevents the same interrupt from interrupting itself which would help prevent potential issues with interrupt handlers corrupting their own stack data.

    To nest the same interrupt, if the priority for the corresponding line is increased by the same or higher priority interrupt, then since the interrupt flag is active, it would nest in the previous routine execution. At the same time, it is strongly recommended to not do such circular nesting to avoid unnecessary software complications Slight smile Let me know if this works for your application.

    Best Regards,

    Aishwarya

  • 0 in reply to Aishwarya Rajesh
    Intellectual 890 points

    Thank you very much, Aishwarya, for the detailed explanations!

  • 0 in reply to Aishwarya Rajesh
    Intellectual 890 points

    Just one clarification please:

    If I wanted to nest the same interrupt, could I lower the priority of the current active interrupt context, or do I need to increase the priority of the interrupt source?

  • 0
    TI__Mastermind 21495 points

    Beat,

    I haven’t tried this myself, but I suspect that lowering the current interrupt priority could work but be more difficult to execute the nesting correctly because once an interrupt could already be asserted on the CPU interrupt line. Let me know if you give it a try and what your results are.

    Best Regards,

    Aishwarya

  • 0 in reply to Aishwarya Rajesh
    Intellectual 890 points

    Hello Aishwarya,

    I have been unable to find a means to lower the interrupt priority level of the currently active ISR.

    Therefore, I think my only option is to increase the priority of the interrupt source as a function of the nesting level.

    However, your warning about "interrupt handlers corrupting their own stack data" makes me think that I should probably explore other avenues first. Maybe your FreeRTOS port will provide further insights.

    Thank you again,

    Beat

  • +1
    TI__Mastermind 21495 points

    Beat,

    Sounds good, I will leave this E2E thread open for a little while longer in case you have more questions about interrupt configurations (in a non FreeRTOS context). If you have any questions regarding interrupt configuration with FreeRTOS, please start a new thread. 

    Best Regards,

    Aishwarya

  • 0
    TI__Mastermind 21495 points

    Beat,

    Are there any other further questions? Please mark this thread as resolved, if the issue is resolved.

    Best Regards,

    Aishwarya

  • 0 in reply to Aishwarya Rajesh
    Intellectual 890 points

    Hello Aishwarya - thank you for following-up.

    Yes, we can consider this thread resolved.